diff --git a/include/boards/afcv3/mem_layout.h b/include/boards/afcv3/mem_layout.h
index 3cf2a40a70d6f314220d8cd500e41e14dede044e..582deae63275efa30ba085d130e0e20b4636fc0b 100644
--- a/include/boards/afcv3/mem_layout.h
+++ b/include/boards/afcv3/mem_layout.h
@@ -16,7 +16,7 @@
 /* Should be autodiscovered by SDB */
 
 /* Wishbone RAW Addresses */
-#define FMC1_130M_BASE_RAW_ADDR                     0x00310000
+#define FMC1_130M_BASE_RAW_ADDR                     0x00320000
 
 #define FMC1_130M_CTRL_RAW_REGS                     (FMC1_130M_BASE_RAW_ADDR +  \
                                                         FMC_130M_CTRL_RAW_REGS_OFFS)
@@ -29,7 +29,7 @@
 #define FMC1_130M_LM75A_RAW_I2C                     (FMC1_130M_BASE_RAW_ADDR + \
                                                         FMC_130M_LM75A_RAW_I2C_OFFS)
 
-#define FMC1_250M_BASE_RAW_ADDR                     0x00310000
+#define FMC1_250M_BASE_RAW_ADDR                     0x00320000
 
 #define FMC1_250M_CTRL_RAW_REGS                     (FMC1_250M_BASE_RAW_ADDR +  \
                                                         FMC_250M_CTRL_RAW_REGS_OFFS)
@@ -44,7 +44,7 @@
 #define FMC1_250M_ISLA216P_RAW_SPI                  (FMC1_250M_BASE_RAW_ADDR +  \
                                                         FMC_250M_ISLA216P_RAW_SPI_OFFS)
 
-#define DSP1_BASE_RAW_ADDR                          0x00308000
+#define DSP1_BASE_RAW_ADDR                          0x00310000
 
 #define DSP1_CTRL_RAW_REGS                          (DSP1_BASE_RAW_ADDR +       \
                                                         DSP_CTRL_RAW_REGS_OFFS)
diff --git a/include/boards/afcv3_1/mem_layout.h b/include/boards/afcv3_1/mem_layout.h
index 3cf2a40a70d6f314220d8cd500e41e14dede044e..582deae63275efa30ba085d130e0e20b4636fc0b 100644
--- a/include/boards/afcv3_1/mem_layout.h
+++ b/include/boards/afcv3_1/mem_layout.h
@@ -16,7 +16,7 @@
 /* Should be autodiscovered by SDB */
 
 /* Wishbone RAW Addresses */
-#define FMC1_130M_BASE_RAW_ADDR                     0x00310000
+#define FMC1_130M_BASE_RAW_ADDR                     0x00320000
 
 #define FMC1_130M_CTRL_RAW_REGS                     (FMC1_130M_BASE_RAW_ADDR +  \
                                                         FMC_130M_CTRL_RAW_REGS_OFFS)
@@ -29,7 +29,7 @@
 #define FMC1_130M_LM75A_RAW_I2C                     (FMC1_130M_BASE_RAW_ADDR + \
                                                         FMC_130M_LM75A_RAW_I2C_OFFS)
 
-#define FMC1_250M_BASE_RAW_ADDR                     0x00310000
+#define FMC1_250M_BASE_RAW_ADDR                     0x00320000
 
 #define FMC1_250M_CTRL_RAW_REGS                     (FMC1_250M_BASE_RAW_ADDR +  \
                                                         FMC_250M_CTRL_RAW_REGS_OFFS)
@@ -44,7 +44,7 @@
 #define FMC1_250M_ISLA216P_RAW_SPI                  (FMC1_250M_BASE_RAW_ADDR +  \
                                                         FMC_250M_ISLA216P_RAW_SPI_OFFS)
 
-#define DSP1_BASE_RAW_ADDR                          0x00308000
+#define DSP1_BASE_RAW_ADDR                          0x00310000
 
 #define DSP1_CTRL_RAW_REGS                          (DSP1_BASE_RAW_ADDR +       \
                                                         DSP_CTRL_RAW_REGS_OFFS)