Altium

Design Rule Verification Report

Date: 19/5/2017
Time: 10:16:51 AM
Elapsed Time: 00:00:08
Filename: C:\Users\smkilani\Documents\atfc\hardware\altium\atfc.PcbDoc
Warnings: 9
Rule Violations: 151

Summary

Warnings Count
3 Net Ties failed verification 3
Zero hole size multi-layer pad(s) detected 3
Multilayer Pads with 0 size Hole found 3
Total 9

Rule Violations Count
Clearance Constraint (Gap=6mil) (All),(All) 0
Short-Circuit Constraint (Allowed=No) (All),(All) 0
Un-Routed Net Constraint ( (All) ) 0
Modified Polygon (Allow modified: No), (Allow shelved: No) 0
Width Constraint (Min=3.937mil) (Max=196.85mil) (Preferred=10mil) (All) 0
Power Plane Connect Rule(Direct Connect )(Expansion=20mil) (Conductor Width=10mil) (Air Gap=10mil) (Entries=4) (All) 0
Hole Size Constraint (Min=1mil) (Max=100mil) (All) 6
Hole To Hole Clearance (Gap=5mil) (All),(All) 0
Minimum Solder Mask Sliver (Gap=1mil) (All),(All) 90
Silk To Solder Mask (Clearance=10mil) (Disabled)(IsPad),(All) 0
Silk to Silk (Clearance=5mil) (All),(All) 20
Net Antennae (Tolerance=0mil) (All) 0
Length Constraint (Min=0mil) (Max=100000mil) (All) 0
Matched Lengths(Tolerance=40mil) (InAnyDifferentialPair) 35
Max Via Stub Length (Back Drilling rule) (Max Stub Length = 15mil) (InAnyDifferentialPair) 0
Room SFP (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('SFP')) 0
Room Regulators (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('Regulators')) 0
Room PWR_APD5052 (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('PWR_APD5052')) 0
Room IO (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('IO')) 0
Room FMC (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('FMC')) 0
Room Config (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('Config')) 0
Room FPGA_Banks1 (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('FPGA_Banks1')) 0
Room FPGA_PWR (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('FPGA_PWR')) 0
Room FPGA_Banks2 (Bounding Region = (0mil, 0mil, 2000mil, 1000mil) (Disabled)(InComponentClass('FPGA_Banks2')) 0
Height Constraint (Min=0mil) (Max=1000mil) (Prefered=500mil) (All) 0
Total 151

Warnings

3 Net Ties failed verification
SMT SIP Component R79-LRMAM1206-R02FT5 (1617mil,3431.898mil) on Component Side, SMT SIP Component R79-LRMAM1206-R02FT5 (1617mil,3431.898mil) on Component Side, has isolated copper
SMT SIP Component R62-LRMAM1206-R02FT5 (1782.756mil,1753mil) on Component Side, SMT SIP Component R62-LRMAM1206-R02FT5 (1782.756mil,1753mil) on Component Side, has isolated copper
SMT SIP Component R55-LRMAM1206-R02FT5 (1167.047mil,4860.772mil) on Component Side, SMT SIP Component R55-LRMAM1206-R02FT5 (1167.047mil,4860.772mil) on Component Side, has isolated copper

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Zero hole size multi-layer pad(s) detected
Pad J2-1(1192.913mil,5078.74mil) on Multi-Layer on Net NetJ2_1
Pad J2-2(1192.913mil,5322.835mil) on Multi-Layer on Net GND
Pad J2-3(996.063mil,5204.724mil) on Multi-Layer on Net GND

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Multilayer Pads with 0 size Hole found
Pad J2-1(1192.913mil,5078.74mil) on Multi-Layer
Pad J2-2(1192.913mil,5322.835mil) on Multi-Layer
Pad J2-3(996.063mil,5204.724mil) on Multi-Layer

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Hole Size Constraint (Min=1mil) (Max=100mil) (All)
Hole Size Constraint: (106.299mil > 100mil) Pad Free-MH3(6901mil,1537mil) on Multi-Layer Actual Hole Size = 106.299mil
Hole Size Constraint: (106.299mil > 100mil) Pad Free-MH3(801mil,1537mil) on Multi-Layer Actual Hole Size = 106.299mil
Hole Size Constraint: (106.299mil > 100mil) Pad Free-MH3(801mil,5487mil) on Multi-Layer Actual Hole Size = 106.299mil
Hole Size Constraint: (106.299mil > 100mil) Pad Free-MH3(6901mil,5487mil) on Multi-Layer Actual Hole Size = 106.299mil
Hole Size Constraint: (106.299mil > 100mil) Pad Free-MH3(6551.181mil,4601.996mil) on Multi-Layer Actual Hole Size = 106.299mil
Hole Size Constraint: (106.299mil > 100mil) Pad Free-MH3(6551.181mil,2121.681mil) on Multi-Layer Actual Hole Size = 106.299mil

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Minimum Solder Mask Sliver (Gap=1mil) (All),(All)
Minimum Solder Mask Sliver Constraint: (0.488mil < 1mil) Between Pad R16-2(1151.528mil,4144mil) on Component Side And Pad B2-3(1197.417mil,4144.496mil) on Component Side [Top Solder] Mask Sliver [0.488mil]
Minimum Solder Mask Sliver Constraint: (0.37mil < 1mil) Between Pad C7-1(3063.268mil,3452mil) on Component Side And Pad IC2-5(3023.402mil,3452mil) on Component Side [Top Solder] Mask Sliver [0.37mil]
Minimum Solder Mask Sliver Constraint: (0.37mil < 1mil) Between Pad C6-1(3063.268mil,3409mil) on Component Side And Pad IC2-4(3023.402mil,3409.677mil) on Component Side [Top Solder] Mask Sliver [0.37mil]
Minimum Solder Mask Sliver Constraint: (0.878mil < 1mil) Between Pad Q2-5(2405.338mil,2211.685mil) on Component Side And Pad Q2-6_2(2366.244mil,2175.347mil) on Component Side [Top Solder] Mask Sliver [0.878mil]
Minimum Solder Mask Sliver Constraint: (0.878mil < 1mil) Between Pad Q2-5_2(2366.263mil,2223.201mil) on Component Side And Pad Q2-6_2(2366.244mil,2175.347mil) on Component Side [Top Solder] Mask Sliver [0.878mil]
Minimum Solder Mask Sliver Constraint: (0.858mil < 1mil) Between Pad Q2-6(2405.338mil,2186.882mil) on Component Side And Pad Q2-5_2(2366.263mil,2223.201mil) on Component Side [Top Solder] Mask Sliver [0.858mil]
Minimum Solder Mask Sliver Constraint: (0.858mil < 1mil) Between Pad Q2-5(2405.338mil,2211.685mil) on Component Side And Pad Q2-6(2405.338mil,2186.882mil) on Component Side [Top Solder] Mask Sliver [0.858mil]
Minimum Solder Mask Sliver Constraint: (0.784mil < 1mil) Between Via (2654.685mil,2030mil) from Component Side to Bottom Side And Pad U8-43(2656.157mil,2061.142mil) on Component Side [Top Solder] Mask Sliver [0.784mil]
Minimum Solder Mask Sliver Constraint: (0.496mil < 1mil) Between Pad R79-2(1681.961mil,3431.898mil) on Component Side And Pad R79-4(1635mil,3431.898mil) on Component Side [Top Solder] Mask Sliver [0.496mil]
Minimum Solder Mask Sliver Constraint: (0.496mil < 1mil) Between Pad R79-1(1552.039mil,3431.898mil) on Component Side And Pad R79-3(1599mil,3431.898mil) on Component Side [Top Solder] Mask Sliver [0.496mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,2977.205mil) from Component Side to Bottom Side And Pad J1-G13(6547.441mil,2987.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,2947.205mil) from Component Side to Bottom Side And Pad J1-G12(6547.441mil,2937.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6523.441mil,2675.205mil) from Component Side to Bottom Side And Pad J1-G7(6547.441mil,2687.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6523.441mil,2699.205mil) from Component Side to Bottom Side And Pad J1-G7(6547.441mil,2687.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6523.441mil,2625.205mil) from Component Side to Bottom Side And Pad J1-G6(6547.441mil,2637.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6523.441mil,2649.205mil) from Component Side to Bottom Side And Pad J1-G6(6547.441mil,2637.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3677.205mil) from Component Side to Bottom Side And Pad J1-D27(6397.441mil,3687.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3647.205mil) from Component Side to Bottom Side And Pad J1-D26(6397.441mil,3637.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3077.205mil) from Component Side to Bottom Side And Pad J1-D15(6397.441mil,3087.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3047.205mil) from Component Side to Bottom Side And Pad J1-D14(6397.441mil,3037.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6622.441mil,2727.205mil) from Component Side to Bottom Side And Pad J1-H8(6597.441mil,2737.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6622.441mil,2697.205mil) from Component Side to Bottom Side And Pad J1-H7(6597.441mil,2687.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,4027.205mil) from Component Side to Bottom Side And Pad J1-G34(6547.441mil,4037.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3997.205mil) from Component Side to Bottom Side And Pad J1-G33(6547.441mil,3987.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3877.205mil) from Component Side to Bottom Side And Pad J1-G31(6547.441mil,3887.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3847.205mil) from Component Side to Bottom Side And Pad J1-G30(6547.441mil,3837.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3727.205mil) from Component Side to Bottom Side And Pad J1-G28(6547.441mil,3737.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3697.205mil) from Component Side to Bottom Side And Pad J1-G27(6547.441mil,3687.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3577.205mil) from Component Side to Bottom Side And Pad J1-G25(6547.441mil,3587.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3527.205mil) from Component Side to Bottom Side And Pad J1-D24(6397.441mil,3537.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3547.205mil) from Component Side to Bottom Side And Pad J1-G24(6547.441mil,3537.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3497.205mil) from Component Side to Bottom Side And Pad J1-D23(6397.441mil,3487.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3427.205mil) from Component Side to Bottom Side And Pad J1-G22(6547.441mil,3437.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3397.205mil) from Component Side to Bottom Side And Pad J1-G21(6547.441mil,3387.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3277.205mil) from Component Side to Bottom Side And Pad J1-G19(6547.441mil,3287.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3227.205mil) from Component Side to Bottom Side And Pad J1-D18(6397.441mil,3237.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3247.205mil) from Component Side to Bottom Side And Pad J1-G18(6547.441mil,3237.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,3197.205mil) from Component Side to Bottom Side And Pad J1-D17(6397.441mil,3187.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3127.205mil) from Component Side to Bottom Side And Pad J1-G16(6547.441mil,3137.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,3097.205mil) from Component Side to Bottom Side And Pad J1-G15(6547.441mil,3087.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,2927.205mil) from Component Side to Bottom Side And Pad J1-D12(6397.441mil,2937.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6422.441mil,2897.205mil) from Component Side to Bottom Side And Pad J1-D11(6397.441mil,2887.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,2827.205mil) from Component Side to Bottom Side And Pad J1-G10(6547.441mil,2837.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.426mil < 1mil) Between Via (6522.441mil,2797.205mil) from Component Side to Bottom Side And Pad J1-G9(6547.441mil,2787.205mil) on Component Side [Top Solder] Mask Sliver [0.426mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6571.441mil,2599.205mil) from Component Side to Bottom Side And Pad J1-G5(6547.441mil,2587.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6571.441mil,2525.205mil) from Component Side to Bottom Side And Pad J1-G4(6547.441mil,2537.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.968mil < 1mil) Between Via (6372.638mil,2449.008mil) from Component Side to Bottom Side And Pad J1-D2(6397.441mil,2437.205mil) on Component Side [Top Solder] Mask Sliver [0.968mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6573.441mil,2549.205mil) from Component Side to Bottom Side And Pad J1-H4(6597.441mil,2537.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.333mil < 1mil) Between Via (6573.441mil,2575.205mil) from Component Side to Bottom Side And Pad J1-H5(6597.441mil,2587.205mil) on Component Side [Top Solder] Mask Sliver [0.333mil]
Minimum Solder Mask Sliver Constraint: (0.819mil < 1mil) Between Via (1001mil,3151.898mil) from Component Side to Bottom Side And Pad C102-2(1014mil,3119.299mil) on Component Side [Top Solder] Mask Sliver [0.819mil]
Minimum Solder Mask Sliver Constraint: (0.819mil < 1mil) Between Via (1030mil,3151.898mil) from Component Side to Bottom Side And Pad C102-2(1014mil,3119.299mil) on Component Side [Top Solder] Mask Sliver [0.819mil]
Minimum Solder Mask Sliver Constraint: (0.457mil < 1mil) Between Via (1539mil,2985.898mil) from Component Side to Bottom Side And Pad C106-1(1508.732mil,2985.898mil) on Component Side [Top Solder] Mask Sliver [0.457mil]
Minimum Solder Mask Sliver Constraint: (0.957mil < 1mil) Between Via (2449.685mil,2194mil) from Component Side to Bottom Side And Pad C79-1(2456.685mil,2165.732mil) on Component Side [Top Solder] Mask Sliver [0.957mil]
Minimum Solder Mask Sliver Constraint: (0.957mil < 1mil) Between Via (2464.099mil,2213mil) from Component Side to Bottom Side And Pad C85-2(2457.685mil,2241.268mil) on Component Side [Top Solder] Mask Sliver [0.957mil]
Minimum Solder Mask Sliver Constraint: (0.549mil < 1mil) Between Via (2616.685mil,1944mil) from Component Side to Bottom Side And Pad C96-1(2641.685mil,1966.268mil) on Component Side [Top Solder] Mask Sliver [0.549mil]
Minimum Solder Mask Sliver Constraint: (0.347mil < 1mil) Between Via (2827.016mil,4306mil) from Component Side to Bottom Side And Pad J3-10(2827.685mil,4363.717mil) on Component Side [Top Solder] Mask Sliver [0.347mil]
Minimum Solder Mask Sliver Constraint: (0.347mil < 1mil) Between Via (2858.512mil,4306mil) from Component Side to Bottom Side And Pad J3-9(2859.181mil,4363.717mil) on Component Side [Top Solder] Mask Sliver [0.347mil]
Minimum Solder Mask Sliver Constraint: (0.347mil < 1mil) Between Via (2921.504mil,4306mil) from Component Side to Bottom Side And Pad J3-7(2922.173mil,4363.717mil) on Component Side [Top Solder] Mask Sliver [0.347mil]
Minimum Solder Mask Sliver Constraint: (0.347mil < 1mil) Between Via (2953mil,4306mil) from Component Side to Bottom Side And Pad J3-6(2953.669mil,4363.717mil) on Component Side [Top Solder] Mask Sliver [0.347mil]
Minimum Solder Mask Sliver Constraint: (0.347mil < 1mil) Between Via (3047.488mil,4306mil) from Component Side to Bottom Side And Pad J3-3(3048.157mil,4363.717mil) on Component Side [Top Solder] Mask Sliver [0.347mil]
Minimum Solder Mask Sliver Constraint: (0.347mil < 1mil) Between Via (3110.48mil,4306mil) from Component Side to Bottom Side And Pad J3-1(3111.15mil,4363.717mil) on Component Side [Top Solder] Mask Sliver [0.347mil]
Minimum Solder Mask Sliver Constraint: (0.315mil < 1mil) Between Via (3607mil,4382mil) from Component Side to Bottom Side And Pad R87-2(3643mil,4379.528mil) on Component Side [Top Solder] Mask Sliver [0.315mil]
Minimum Solder Mask Sliver Constraint: (0.843mil < 1mil) Between Via (3610.472mil,4642.472mil) from Component Side to Bottom Side And Pad R93-1(3647mil,4642.472mil) on Component Side [Top Solder] Mask Sliver [0.843mil]
Minimum Solder Mask Sliver Constraint: (0.975mil < 1mil) Between Via (2640.685mil,1931mil) from Component Side to Bottom Side And Pad R70-1(2662.582mil,1905.284mil) on Component Side [Top Solder] Mask Sliver [0.975mil]
Minimum Solder Mask Sliver Constraint: (0.496mil < 1mil) Between Pad R55-2(1167.047mil,4795.811mil) on Component Side And Pad R55-4(1167.047mil,4842.772mil) on Component Side [Top Solder] Mask Sliver [0.496mil]
Minimum Solder Mask Sliver Constraint: (0.496mil < 1mil) Between Pad R55-1(1167.047mil,4925.732mil) on Component Side And Pad R55-3(1167.047mil,4878.772mil) on Component Side [Top Solder] Mask Sliver [0.496mil]
Minimum Solder Mask Sliver Constraint: (0.496mil < 1mil) Between Pad R62-2(1717.795mil,1753mil) on Component Side And Pad R62-4(1764.756mil,1753mil) on Component Side [Top Solder] Mask Sliver [0.496mil]
Minimum Solder Mask Sliver Constraint: (0.496mil < 1mil) Between Pad R62-1(1847.716mil,1753mil) on Component Side And Pad R62-3(1800.756mil,1753mil) on Component Side [Top Solder] Mask Sliver [0.496mil]
Minimum Solder Mask Sliver Constraint: (0.114mil < 1mil) Between Via (4417.323mil,3881.89mil) from Component Side to Bottom Side And Pad IC1-2(4434mil,3919.402mil) on Bottom Side [Bottom Solder] Mask Sliver [0.114mil]
Minimum Solder Mask Sliver Constraint: (0.374mil < 1mil) Between Via (4417.323mil,3881.89mil) from Component Side to Bottom Side And Pad IC1-1(4391.677mil,3919.402mil) on Bottom Side [Bottom Solder] Mask Sliver [0.374mil]
Minimum Solder Mask Sliver Constraint: (0.162mil < 1mil) Between Via (4417.323mil,3881.89mil) from Component Side to Bottom Side And Pad IC1-6(4391.677mil,3844.598mil) on Bottom Side [Bottom Solder] Mask Sliver [0.162mil]
Minimum Solder Mask Sliver Constraint: (0.629mil < 1mil) Between Via (3332mil,4702mil) from Component Side to Bottom Side And Pad L7-1(3390mil,4699.37mil) on Bottom Side [Bottom Solder] Mask Sliver [0.629mil]
Minimum Solder Mask Sliver Constraint: (0.214mil < 1mil) Between Via (1445.48mil,2014.52mil) from Component Side to Bottom Side And Pad Q1-4(1469.393mil,1994.835mil) on Bottom Side [Bottom Solder] Mask Sliver [0.214mil]
Minimum Solder Mask Sliver Constraint: (0.214mil < 1mil) Between Via (1445.48mil,2014.52mil) from Component Side to Bottom Side And Pad Q1-6(1469.393mil,2034.205mil) on Bottom Side [Bottom Solder] Mask Sliver [0.214mil]
Minimum Solder Mask Sliver Constraint: (0.913mil < 1mil) Between Via (4728.346mil,3015.748mil) from Component Side to Bottom Side And Pad R3-2(4714.347mil,3046.472mil) on Bottom Side [Bottom Solder] Mask Sliver [0.913mil]
Minimum Solder Mask Sliver Constraint: (0.438mil < 1mil) Between Via (2677.165mil,2389.764mil) from Component Side to Bottom Side And Pad R56-1(2649.417mil,2380mil) on Bottom Side [Bottom Solder] Mask Sliver [0.438mil]
Minimum Solder Mask Sliver Constraint: (0.448mil < 1mil) Between Via (3590.551mil,3759.843mil) from Component Side to Bottom Side And Pad R78-1(3562.992mil,3782.48mil) on Bottom Side [Bottom Solder] Mask Sliver [0.448mil]
Minimum Solder Mask Sliver Constraint: (0.591mil < 1mil) Between Via (5173.228mil,4362.205mil) from Component Side to Bottom Side And Pad U3-5(5170.591mil,4331.803mil) on Bottom Side [Bottom Solder] Mask Sliver [0.591mil]
Minimum Solder Mask Sliver Constraint: (0.839mil < 1mil) Between Via (4139mil,3887mil) from Component Side to Bottom Side And Pad U14-4(4103mil,3878.41mil) on Bottom Side [Bottom Solder] Mask Sliver [0.839mil]
Minimum Solder Mask Sliver Constraint: (0.083mil < 1mil) Between Via (6573.441mil,2575.205mil) from Component Side to Bottom Side And Via (6571.441mil,2599.205mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.083mil] / [Bottom Solder] Mask Sliver [0.083mil]
Minimum Solder Mask Sliver Constraint: (0.083mil < 1mil) Between Via (6573.441mil,2549.205mil) from Component Side to Bottom Side And Via (6571.441mil,2525.205mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.083mil] / [Bottom Solder] Mask Sliver [0.083mil]
Minimum Solder Mask Sliver Constraint: (0.622mil < 1mil) Between Via (1901.575mil,1992.126mil) from Component Side to Bottom Side And Via (1925.197mil,1992.126mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.622mil] / [Bottom Solder] Mask Sliver [0.622mil]
Minimum Solder Mask Sliver Constraint: (0.121mil < 1mil) Between Via (2677.16mil,2035.429mil) from Component Side to Bottom Side And Via (2654.685mil,2030mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.121mil] / [Bottom Solder] Mask Sliver [0.121mil]
Minimum Solder Mask Sliver Constraint: (0.849mil < 1mil) Between Via (2464.099mil,2213mil) from Component Side to Bottom Side And Via (2449.685mil,2194mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.849mil] / [Bottom Solder] Mask Sliver [0.849mil]
Minimum Solder Mask Sliver Constraint: (0.402mil < 1mil) Between Via (4350mil,2538mil) from Component Side to Bottom Side And Via (4350mil,2566.402mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.402mil] / [Bottom Solder] Mask Sliver [0.402mil]
Minimum Solder Mask Sliver Constraint: (0.4mil < 1mil) Between Via (3607mil,4406.4mil) from Component Side to Bottom Side And Via (3607mil,4382mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.4mil] / [Bottom Solder] Mask Sliver [0.4mil]
Minimum Solder Mask Sliver Constraint: (0.4mil < 1mil) Between Via (3607mil,4430.8mil) from Component Side to Bottom Side And Via (3607mil,4406.4mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.4mil] / [Bottom Solder] Mask Sliver [0.4mil]
Minimum Solder Mask Sliver Constraint: (0.4mil < 1mil) Between Via (3607mil,4455.2mil) from Component Side to Bottom Side And Via (3607mil,4430.8mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.4mil] / [Bottom Solder] Mask Sliver [0.4mil]
Minimum Solder Mask Sliver Constraint: (0.4mil < 1mil) Between Via (3607mil,4479.6mil) from Component Side to Bottom Side And Via (3607mil,4455.2mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.4mil] / [Bottom Solder] Mask Sliver [0.4mil]
Minimum Solder Mask Sliver Constraint: (0.4mil < 1mil) Between Via (3607mil,4504mil) from Component Side to Bottom Side And Via (3607mil,4479.6mil) from Component Side to Bottom Side [Top Solder] Mask Sliver [0.4mil] / [Bottom Solder] Mask Sliver [0.4mil]

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Silk to Silk (Clearance=5mil) (All),(All)
Silk To Silk Clearance Constraint: (3.563mil < 5mil) Between Text "9" (4385mil,5084mil) on Top Overlay And Track (4375mil,5054mil)(4375mil,5254mil) on Top Overlay Silk Text to Silk Clearance [3.563mil]
Silk To Silk Clearance Constraint: (3.563mil < 5mil) Between Text "10" (4385mil,5184mil) on Top Overlay And Track (4375mil,5054mil)(4375mil,5254mil) on Top Overlay Silk Text to Silk Clearance [3.563mil]
Silk To Silk Clearance Constraint: (Collision < 5mil) Between Text "Rout1" (1409.449mil,4897.638mil) on Top Overlay And Track (1502.205mil,4828.095mil)(1502.205mil,5339.905mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 5mil) Between Text "C35" (3463.638mil,2839.394mil) on Top Overlay And Track (3462.244mil,2736.244mil)(3462.244mil,3641.756mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (Collision < 5mil) Between Text "C34" (3462.638mil,2900.449mil) on Top Overlay And Track (3462.244mil,2736.244mil)(3462.244mil,3641.756mil) on Top Overlay Silk Text to Silk Clearance [0mil]
Silk To Silk Clearance Constraint: (4.718mil < 5mil) Between Text "C7" (3061mil,3473mil) on Top Overlay And Track (3076mil,3464mil)(3084mil,3464mil) on Top Overlay Silk Text to Silk Clearance [4.718mil]
Silk To Silk Clearance Constraint: (1.61mil < 5mil) Between Text "*" (1381.89mil,2972.441mil) on Top Overlay And Track (1387mil,2961.898mil)(1387mil,2969.898mil) on Top Overlay Silk Text to Silk Clearance [1.61mil]
Silk To Silk Clearance Constraint: (4.374mil < 5mil) Between Text "C76" (2854.331mil,2161.417mil) on Top Overlay And Track (2889.63mil,2195.284mil)(2897.63mil,2195.284mil) on Top Overlay Silk Text to Silk Clearance [4.374mil]
Silk To Silk Clearance Constraint: (3.209mil < 5mil) Between Text "C12" (4169.291mil,3511.811mil) on Bottom Overlay And Track (4177mil,3482mil)(4177mil,3490mil) on Bottom Overlay Silk Text to Silk Clearance [3.209mil]
Silk To Silk Clearance Constraint: (2.303mil < 5mil) Between Text "R13" (3925.197mil,2984.252mil) on Bottom Overlay And Track (3931mil,2977mil)(3931mil,2985mil) on Bottom Overlay Silk Text to Silk Clearance [2.303mil]
Silk To Silk Clearance Constraint: (4.02mil < 5mil) Between Text "R19" (6519mil,3891mil) on Bottom Overlay And Track (6449mil,3904mil)(6449mil,3912mil) on Bottom Overlay Silk Text to Silk Clearance [4.02mil]
Silk To Silk Clearance Constraint: (4.855mil < 5mil) Between Text "R20" (6524mil,4042mil) on Bottom Overlay And Track (6449mil,4058mil)(6449mil,4066mil) on Bottom Overlay Silk Text to Silk Clearance [4.855mil]
Silk To Silk Clearance Constraint: (0.469mil < 5mil) Between Text "R53" (2834.646mil,2035.433mil) on Bottom Overlay And Track (2805.685mil,2002mil)(2805.685mil,2010mil) on Bottom Overlay Silk Text to Silk Clearance [0.469mil]
Silk To Silk Clearance Constraint: (3.656mil < 5mil) Between Text "R57" (2767.716mil,1960.63mil) on Bottom Overlay And Track (2734.685mil,1962mil)(2734.685mil,1970mil) on Bottom Overlay Silk Text to Silk Clearance [3.656mil]
Silk To Silk Clearance Constraint: (4.355mil < 5mil) Between Text "R69" (2791.685mil,1754mil) on Top Overlay And Text "R70" (2715.685mil,1754mil) on Top Overlay Silk Text to Silk Clearance [4.355mil]
Silk To Silk Clearance Constraint: (4.355mil < 5mil) Between Text "R59" (2639.685mil,1754mil) on Top Overlay And Text "R70" (2715.685mil,1754mil) on Top Overlay Silk Text to Silk Clearance [4.355mil]
Silk To Silk Clearance Constraint: (2.355mil < 5mil) Between Text "R59" (2639.685mil,1754mil) on Top Overlay And Text "R61" (2565.685mil,1754mil) on Top Overlay Silk Text to Silk Clearance [2.355mil]
Silk To Silk Clearance Constraint: (4.008mil < 5mil) Between Text "C87" (2711.74mil,1857.716mil) on Top Overlay And Text "R67" (2745.74mil,1857.716mil) on Top Overlay Silk Text to Silk Clearance [4.008mil]
Silk To Silk Clearance Constraint: (3.675mil < 5mil) Between Text "R10" (4962.333mil,3832mil) on Top Overlay And Text "R11" (4928.667mil,3833mil) on Top Overlay Silk Text to Silk Clearance [3.675mil]
Silk To Silk Clearance Constraint: (2.008mil < 5mil) Between Text "C96" (2630.74mil,1872.716mil) on Top Overlay And Text "C97" (2662.74mil,1874.716mil) on Top Overlay Silk Text to Silk Clearance [2.008mil]

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Matched Lengths(Tolerance=40mil) (InAnyDifferentialPair)
Matched Net Lengths: Between Net SFP2_RD_P And Net SFP2_RD_N Actual Difference against SFP2_RD_N is: 41.812mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_MGT_M2C_P And Net FMC_MGT_M2C_N Actual Difference against FMC_MGT_M2C_N is: 65.884mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_MGT_CLK_P And Net FMC_MGT_CLK_N Actual Difference against FMC_MGT_CLK_N is: 159.759mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_MGT_C2M_P And Net FMC_MGT_C2M_N Actual Difference against FMC_MGT_C2M_N is: 63.56mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA32_P And Net FMC_LA32_N Actual Difference against FMC_LA32_N is: 86.156mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA31_P And Net FMC_LA31_N Actual Difference against FMC_LA31_N is: 50.309mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA30_P And Net FMC_LA30_N Actual Difference against FMC_LA30_N is: 86.156mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA29_P And Net FMC_LA29_N Actual Difference against FMC_LA29_N is: 52.906mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA28_P And Net FMC_LA28_N Actual Difference against FMC_LA28_N is: 86.156mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA27_P And Net FMC_LA27_N Actual Difference against FMC_LA27_N is: 120.022mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA26_P And Net FMC_LA26_N Actual Difference against FMC_LA26_N is: 69.264mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA25_P And Net FMC_LA25_N Actual Difference against FMC_LA25_N is: 76.229mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA24_P And Net FMC_LA24_N Actual Difference against FMC_LA24_N is: 90.794mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA23_P And Net FMC_LA23_N Actual Difference against FMC_LA23_N is: 53.332mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA22_P And Net FMC_LA22_N Actual Difference against FMC_LA22_N is: 79.055mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA21_P And Net FMC_LA21_N Actual Difference against FMC_LA21_N is: 86.156mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA20_P And Net FMC_LA20_N Actual Difference against FMC_LA20_N is: 97.543mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA19_P And Net FMC_LA19_N Actual Difference against FMC_LA19_N is: 87.702mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA17_CC_P And Net FMC_LA17_CC_N Actual Difference against FMC_LA17_CC_N is: 86.156mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA16_P And Net FMC_LA16_N Actual Difference against FMC_LA16_N is: 86.121mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA15_P And Net FMC_LA15_N Actual Difference against FMC_LA15_N is: 86.156mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA14_P And Net FMC_LA14_N Actual Difference against FMC_LA14_N is: 82.486mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA13_P And Net FMC_LA13_N Actual Difference against FMC_LA13_N is: 66.368mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA12_P And Net FMC_LA12_N Actual Difference against FMC_LA12_N is: 77.286mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA10_P And Net FMC_LA10_N Actual Difference against FMC_LA10_N is: 69.386mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA09_P And Net FMC_LA09_N Actual Difference against FMC_LA09_N is: 94.045mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA08_P And Net FMC_LA08_N Actual Difference against FMC_LA08_N is: 85.948mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA06_P And Net FMC_LA06_N Actual Difference against FMC_LA06_N is: 118.783mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA05_P And Net FMC_LA05_N Actual Difference against FMC_LA05_N is: 82.078mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA03_P And Net FMC_LA03_N Actual Difference against FMC_LA03_N is: 84.924mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA02_P And Net FMC_LA02_N Actual Difference against FMC_LA02_N is: 102.187mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA01_CC_P And Net FMC_LA01_CC_N Actual Difference against FMC_LA01_CC_N is: 65.275mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_LA00_CC_P And Net FMC_LA00_CC_N Actual Difference against FMC_LA00_CC_N is: 156.593mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_CLK1_M2C_P And Net FMC_CLK1_M2C_N Actual Difference against FMC_CLK1_M2C_N is: 65.246mil, Tolerance : 40mil.
Matched Net Lengths: Between Net FMC_CLK0_M2C_P And Net FMC_CLK0_M2C_N Actual Difference against FMC_CLK0_M2C_N is: 105.581mil, Tolerance : 40mil.

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