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# The AsyncArt Project
The **AsyncArt Project** is comprised by a set of Open-Source HDL libraries and examples
targeted to the efficient implementation of Globally Asynchronous, Locally Synchronous (GALS)
design architectures over Commercial-Off-The-Shelf FPGA devices.
For more information about the **AsynArt** project, visit:
- [The AsyncArt Project at OHR](https://www.ohwr.org/project/asyncart/wikis/home)
# Demo Example
The demo is targeted to the following FPGA board:
- [Lattice iCEstick Evaluation Kit](https://www.latticesemi.com/icestick)
The toochain requirements are:
- [Project IceStorm](http://www.clifford.at/icestorm/)
- [Yosys](http://www.clifford.at/yosys/)
- [Nextpnr](https://github.com/YosysHQ/nextpnr)
For more information about how to build and use the demo, visit:
- [Micropipeline Demo](https://www.ohwr.org/project/asyncart/wikis/micropipeline-demo)
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