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AMC FMC Carrier Kintex AFCK
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Last edited by OHWR Gitlab support Mar 15, 2019
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AFCK

Project description

The AMC FMC carrier is partially based on SPEC (supply, WR clocks) design. Among
many features, the card has very flexible clock circuit that enables any clock
source to be connected to any clock input, including telecom clock, FMC clocks
and FPGA.
It is very similar design to AMC FMC board, the only difference is faster FPGA
from Kintex7 family.



Main features

  • Xilinx Kintex-7 325T FFG900 FPGA
  • 2 GB DDR3 SDRAM (32-bit interface)
  • 2 high pin count (HPC) slots for 2 single width mezzanines or 1 double width
    mezzanine
  • SPI Flash for FPGA configuration
  • SPI Flash for user data storage
  • JTAG multiplexer (SCANSTA) for FMC access
  • Power supply for FPGA, memory, FMCs - programmable VADJ 1.8-3.3V
  • Clock distribution circuit compatible with WR
  • Temperature, voltage and current monitoring for critical power buses
  • Stand-alone power connector
  • Mini-USB connected to the IPMI processor
  • SATA connector for Port2, Port3 with possibility of switching to FPGA MGT
  • MGT connected to FMC1, FMC2, Fat Pipe 1, Fat Pipe 2 (optional), Port0, Port1,
    Port2 (optional), Port3 (optional), RTM (optional)
  • EEPROM with MAC and unique ID
  • RTM connector with 8 GTP routed to it. Compatible with rtm-sfp8 module.

Detailed project information

  • Documentation:
    • Schematics (PDF, Altium sources)
    • PCB (PDF, Altium source)
  • Users

Contacts

Commercial producers

  • Creotech, Poland

General question about project

  • Filip Świtakowski

Project status

Date Event
17-03-2014 Schematics ready for review.
22-07-2014 PCB finished

Filip Świtakowski - 18 Aug 2014

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