Commit 1bfb895b authored by Greg's avatar Greg

afc v3 init repo

parent 1f7bbb39
PORT2=RX2_P,RX2_N,TX2_N,TX2_P
PORT3=RX3_P,RX3_N,TX3_N,TX3_P
AMC_ADD=GA0,GA1,GA2
AMC_FABRIC_CLOCK=FCLKA_N,FCLKA_P
AMC_JTAG=TCK,TDI,TDO,TMS,TRST#
AMC_TELECOM_CLOCK=TCLKA_N,TCLKA_P,TCLKB_N,TCLKB_P,TCLKC_N,TCLKC_P,TCLKD_N,TCLKD_P
FAT_PIPE1=RX4_P,RX4_N,TX4_N,TX4_P,RX5_P,RX5_N,TX5_N,TX5_P,RX6_P,RX6_N,TX6_N,TX6_P,RX7_P,RX7_N,TX7_N,TX7_P
FAT_PIPE2=RX8_P,RX8_N,TX8_N,TX8_P,RX9_P,RX9_N,TX9_N,TX9_P,RX10_P,RX10_N,TX10_N,TX10_P,RX11_P,RX11_N,TX11_N,TX11_P
I2C=SCL,SDA
MLVDS=RX17_P,RX17_N,TX17_N,TX17_P,RX18_P,RX18_N,TX18_N,TX18_P,RX19_P,RX19_N,TX19_N,TX19_P,RX20_P,RX20_N,TX20_N,TX20_P
PORT0=RX0_P,RX0_N,TX0_N,TX0_P
PORT1=RX1_P,RX1_N,TX1_N,TX1_P
PORT2=RX2_P,RX2_N,TX2_N,TX2_P
PORT3=RX3_P,RX3_N,TX3_N,TX3_P
This diff is collapsed.
AMC_ADD=GA0,GA1,GA2
I2C=SCL,SDA
MISC=PRSNT,PG_M2C,PG_C2M
PM_control=1V5_VTT_EN,EN_P1V8,EN_P1V2,EN_FMC1_P12V,EN_FMC2_P12V,EN_FMC1_PVADJ,EN_FMC2_PVADJ,EN_FMC1_P3V3,EN_FMC2_P3V3,DAC_VADJ_CSN,DAC_VADJ_SDI,DAC_VADJ_CLK,DAC_VADJ_RSTN,EN_P1V0,PGOOD_P1V0,EN_P3V3
SCN=ADR0,ADR1,ADR2,ADR3,ADR4,ADR5,ADR6,RSTN
SPI=SCK1,SSEL1,MISO1,MOSI1,PROGRAM_B,DONE,FLASH_Q/D1,FLASH_SI/D0,FPGA_CCLK,FCS_B\
AMC_FABRIC_CLOCK=FCLKA_N,FCLKA_P
AMC_TELECOM_CLOCK=TCLKA_N,TCLKA_P,TCLKB_N,TCLKB_P,TCLKC_N,TCLKC_P,TCLKD_N,TCLKD_P
FPGA_SDRAM_CLK=SDRAM_CLK1_N,SDRAM_CLK1_P,BOOT_CLK_IN
I2C=SDA,SCL
MGT_CLK=PCIE_CLK1_P,PCIE_CLK1_N,PCIE_CLK2_P,PCIE_CLK2_N,FP2_CLK1_P,FP2_CLK1_N,FP2_CLK2_P,FP2_CLK2_N,LINK01_CLK_P,LINK01_CLK_N
PLL_CTRL=VADJ2_SI57X_SDA,VADJ2_SI57X_SCL,PLL_VADJ2_DAC2_SYNC_N,PLL_VADJ2_DAC_SCLK,PLL_VADJ2_DAC1_SYNC_N,PLL_VADJ2_DAC_DIN,VADJ2_SI57X_OE,VADJ2_SI57X_TUNE,VADJ2_CLK_UPDATEN
FMC_CLOCKS=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P,CLK_DIR
FMC_FPGA_CLK_IN=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_FPGA_CLK_IN=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_J1_HA=HA00_CC_N,HA00_CC_P,HA01_CC_N,HA01_CC_P,HA02_N,HA02_P,HA03_N,HA03_P,HA04_N,HA04_P,HA05_N,HA05_P,HA06_N,HA06_P,HA07_N,HA07_P,HA08_N,HA08_P,HA09_N,HA09_P,HA10_N,HA10_P,HA11_N,HA11_P,HA12_N,HA12_P,HA13_N,HA13_P,HA14_N,HA14_P,HA15_N,HA15_P,HA16_N,HA16_P,HA17_CC_N,HA17_CC_P,HA18_N,HA18_P,HA19_N,HA19_P,HA20_N,HA20_P,HA21_N,HA21_P,HA22_N,HA22_P,HA23_N,HA23_P
FMC_J1_HB=HB00_CC_N,HB00_CC_P,HB01_N,HB01_P,HB02_N,HB02_P,HB03_N,HB03_P,HB04_N,HB04_P,HB05_N,HB05_P,HB06_CC_N,HB06_CC_P,HB07_N,HB07_P,HB08_N,HB08_P,HB09_N,HB09_P,HB10_N,HB10_P,HB11_N,HB11_P,HB12_N,HB12_P,HB13_N,HB13_P,HB14_N,HB14_P,HB15_N,HB15_P,HB16_N,HB16_P,HB17_CC_N,HB17_CC_P,HB18_N,HB18_P,HB19_N,HB19_P,HB20_N,HB20_P,HB21_N,HB21_P
FMC_J1_LA=LA00_CC_N,LA00_CC_P,LA01_CC_N,LA01_CC_P,LA02_N,LA02_P,LA03_N,LA03_P,LA04_N,LA04_P,LA05_N,LA05_P,LA06_N,LA06_P,LA07_N,LA07_P,LA08_N,LA08_P,LA09_N,LA09_P,LA10_N,LA10_P,LA11_N,LA11_P,LA12_N,LA12_P,LA13_N,LA13_P,LA14_N,LA14_P,LA15_N,LA15_P,LA16_N,LA16_P,LA17_CC_N,LA17_CC_P,LA18_CC_N,LA18_CC_P,LA19_N,LA19_P,LA20_N,LA20_P,LA21_N,LA21_P,LA22_N,LA22_P,LA23_N,LA23_P,LA24_N,LA24_P,LA25_N,LA25_P,LA26_N,LA26_P,LA27_N,LA27_P,LA28_N,LA28_P,LA29_N,LA29_P,LA30_N,LA30_P,LA31_N,LA31_P,LA32_N,LA32_P,LA33_N,LA33_P
FMC_J1_VREF=VREF_A_M2C,VREF_B_M2C
I2C=SCL,SDA
FMC_FPGA_CLK_IN=CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_J1_HA=HA00_CC_N,HA00_CC_P,HA01_CC_N,HA01_CC_P,HA02_N,HA02_P,HA03_N,HA03_P,HA04_N,HA04_P,HA05_N,HA05_P,HA06_N,HA06_P,HA07_N,HA07_P,HA08_N,HA08_P,HA09_N,HA09_P,HA10_N,HA10_P,HA11_N,HA11_P,HA12_N,HA12_P,HA13_N,HA13_P,HA14_N,HA14_P,HA15_N,HA15_P,HA16_N,HA16_P,HA17_CC_N,HA17_CC_P,HA18_N,HA18_P,HA19_N,HA19_P,HA20_N,HA20_P,HA21_N,HA21_P,HA22_N,HA22_P,HA23_N,HA23_P
FMC_J1_HB=HB00_CC_N,HB00_CC_P,HB01_N,HB01_P,HB02_N,HB02_P,HB03_N,HB03_P,HB04_N,HB04_P,HB05_N,HB05_P,HB06_CC_N,HB06_CC_P,HB07_N,HB07_P,HB08_N,HB08_P,HB09_N,HB09_P,HB10_N,HB10_P,HB11_N,HB11_P,HB12_N,HB12_P,HB13_N,HB13_P,HB14_N,HB14_P,HB15_N,HB15_P,HB16_N,HB16_P,HB17_CC_N,HB17_CC_P,HB18_N,HB18_P,HB19_N,HB19_P,HB20_N,HB20_P,HB21_N,HB21_P
FMC_J1_LA=LA00_CC_N,LA00_CC_P,LA01_CC_N,LA01_CC_P,LA02_N,LA02_P,LA03_N,LA03_P,LA04_N,LA04_P,LA05_N,LA05_P,LA06_N,LA06_P,LA07_N,LA07_P,LA08_N,LA08_P,LA09_N,LA09_P,LA10_N,LA10_P,LA11_N,LA11_P,LA12_N,LA12_P,LA13_N,LA13_P,LA14_N,LA14_P,LA15_N,LA15_P,LA16_N,LA16_P,LA17_CC_N,LA17_CC_P,LA18_CC_N,LA18_CC_P,LA19_N,LA19_P,LA20_N,LA20_P,LA21_N,LA21_P,LA22_N,LA22_P,LA23_N,LA23_P,LA24_N,LA24_P,LA25_N,LA25_P,LA26_N,LA26_P,LA27_N,LA27_P,LA28_N,LA28_P,LA29_N,LA29_P,LA30_N,LA30_P,LA31_N,LA31_P,LA32_N,LA32_P,LA33_N,LA33_P
FMC_J1_VREF=VREF_A_M2C,VREF_B_M2C
FPGA_FLASH=FLASH_FCS_B\,FLASH_D3,FLASH_D2,FLASH_Q/D1,FLASH_SI/D0
PLL_CTRL=VADJ2_SI57X_SDA,VADJ2_SI57X_SCL,PLL_VADJ2_DAC2_SYNC_N,PLL_VADJ2_DAC_SCLK,PLL_VADJ2_DAC1_SYNC_N,PLL_VADJ2_DAC_DIN,VADJ2_SI57X_OE,VADJ2_SI57X_TUNE,VADJ2_CLK_UPDATEN
FMC_CLOCKS=CLK_DIR,CLK0_M2C_N,CLK0_M2C_P,CLK1_M2C_N,CLK1_M2C_P,CLK2_BIDIR_N,CLK2_BIDIR_P,CLK3_BIDIR_N,CLK3_BIDIR_P
FMC_J1_DP=DP0_C2M_N,DP0_C2M_P,DP1_C2M_N,DP1_C2M_P,DP2_C2M_N,DP2_C2M_P,DP3_C2M_N,DP3_C2M_P,DP0_M2C_N,DP0_M2C_P,DP1_M2C_N,DP1_M2C_P,DP2_M2C_N,DP2_M2C_P,DP3_M2C_N,DP3_M2C_P
FMC_J1_HA=HA00_CC_N,HA00_CC_P,HA01_CC_N,HA01_CC_P,HA02_N,HA02_P,HA03_N,HA03_P,HA04_N,HA04_P,HA05_N,HA05_P,HA06_N,HA06_P,HA07_N,HA07_P,HA08_N,HA08_P,HA09_N,HA09_P,HA10_N,HA10_P,HA11_N,HA11_P,HA12_N,HA12_P,HA13_N,HA13_P,HA14_N,HA14_P,HA15_N,HA15_P,HA16_N,HA16_P,HA17_CC_N,HA17_CC_P,HA18_N,HA18_P,HA19_N,HA19_P,HA20_N,HA20_P,HA21_N,HA21_P,HA22_N,HA22_P,HA23_N,HA23_P
FMC_J1_HB=HB00_CC_N,HB00_CC_P,HB01_N,HB01_P,HB02_N,HB02_P,HB03_N,HB03_P,HB04_N,HB04_P,HB05_N,HB05_P,HB06_CC_N,HB06_CC_P,HB07_N,HB07_P,HB08_N,HB08_P,HB09_N,HB09_P,HB10_N,HB10_P,HB11_N,HB11_P,HB12_N,HB12_P,HB13_N,HB13_P,HB14_N,HB14_P,HB15_N,HB15_P,HB16_N,HB16_P,HB17_CC_N,HB17_CC_P,HB18_N,HB18_P,HB19_N,HB19_P,HB20_N,HB20_P,HB21_N,HB21_P
FMC_J1_JTAG=TCK,TDI,TDO,TMS,TRST_L
FMC_J1_LA=LA00_CC_N,LA00_CC_P,LA01_CC_N,LA01_CC_P,LA02_N,LA02_P,LA03_N,LA03_P,LA04_N,LA04_P,LA05_N,LA05_P,LA06_N,LA06_P,LA07_N,LA07_P,LA08_N,LA08_P,LA09_N,LA09_P,LA10_N,LA10_P,LA11_N,LA11_P,LA12_N,LA12_P,LA13_N,LA13_P,LA14_N,LA14_P,LA15_N,LA15_P,LA16_N,LA16_P,LA17_CC_N,LA17_CC_P,LA18_CC_N,LA18_CC_P,LA19_N,LA19_P,LA20_N,LA20_P,LA21_N,LA21_P,LA22_N,LA22_P,LA23_N,LA23_P,LA24_N,LA24_P,LA25_N,LA25_P,LA26_N,LA26_P,LA27_N,LA27_P,LA28_N,LA28_P,LA29_N,LA29_P,LA30_N,LA30_P,LA31_N,LA31_P,LA32_N,LA32_P,LA33_N,LA33_P
FMC_J1_POWER=3P3VAUX,12P0V,VIO_B_M2C
FMC_J1_VREF=VREF_A_M2C,VREF_B_M2C
GBT_CLOCK=GBTCLK0_M2C_N,GBTCLK0_M2C_P,GBTCLK1_M2C_N,GBTCLK1_M2C_P
I2C=SCL,SDA
MISC=PRSNT,PG_M2C,PG_C2M
FMC_J1_JTAG=TCK,TDI,TDO,TMS,TRST_L
FPGA_FLASH=FLASH_SI/D0,FLASH_Q/D1,FLASH_D2,FLASH_D3,FLASH_FCS_B\
FPGA_THERM=DXN,DXP
RTM_LVDS=RTM_LVD0_N,RTM_LVD0_P,RTM_LVD1_N,RTM_LVD1_P,RTM_LVD2_N,RTM_LVD2_P,RTM_LVD3_N,RTM_LVD3_P,RTM_LVD4_N,RTM_LVD4_P,RTM_LVD5_N,RTM_LVD5_P,RTM_LVD6_N,RTM_LVD6_P,RTM_LVD7_N,RTM_LVD7_P
SPI=SCK1,SSEL1,MISO1,MOSI1,PROGRAM_B,DONE,FLASH_Q/D1,FLASH_SI/D0,FPGA_CCLK,FCS_B\
FAT_PIPE1=RX4_P,RX4_N,TX4_N,TX4_P,RX5_P,RX5_N,TX5_N,TX5_P,RX6_P,RX6_N,TX6_N,TX6_P,RX7_P,RX7_N,TX7_N,TX7_P
FAT_PIPE2=RX8_P,RX8_N,TX8_N,TX8_P,RX9_P,RX9_N,TX9_N,TX9_P,RX10_P,RX10_N,TX10_N,TX10_P,RX11_P,RX11_N,TX11_N,TX11_P
FMC_J1_DP=DP0_C2M_N,DP0_C2M_P,DP1_C2M_N,DP1_C2M_P,DP2_C2M_N,DP2_C2M_P,DP3_C2M_N,DP3_C2M_P,DP0_M2C_N,DP0_M2C_P,DP1_M2C_N,DP1_M2C_P,DP2_M2C_N,DP2_M2C_P,DP3_M2C_N,DP3_M2C_P
GBT_CLOCK=GBTCLK0_M2C_N,GBTCLK0_M2C_P,GBTCLK1_M2C_N,GBTCLK1_M2C_P
MGT_CLK=PCIE_CLK1_P,PCIE_CLK1_N,PCIE_CLK2_P,PCIE_CLK2_N,FP2_CLK1_P,FP2_CLK1_N,FP2_CLK2_P,FP2_CLK2_N,LINK01_CLK_P,LINK01_CLK_N
PORT0=RX0_P,RX0_N,TX0_N,TX0_P
PORT1=RX1_P,RX1_N,TX1_N,TX1_P
PORT2=RX2_P,RX2_N,TX2_N,TX2_P
PORT3=RX3_P,RX3_N,TX3_N,TX3_P
DDR=DQS0_P,DQS0_N,DQS1_P,DQS1_N,DQS2_P,DQS2_N,DQS3_P,DQS3_N,CLK0_N,CLK0_P,RST_N,ODT0,CE0_N,BA0,BA1,BA2,A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14,A15,CAS_N,RAS_N,WE_N,CKE0,DQM0,D0,D1,D2,D3,D4,D5,D6,D7,DQM1,D8,D9,D10,D11,D12,D13,D14,D15,DQM2,D16,D17,D18,D19,D20,D21,D22,D23,DQM3,D24,D25,D26,D27,D28,D29,D30,D31
FPGA_SDRAM_CLK=SDRAM_CLK1_N,SDRAM_CLK1_P,BOOT_CLK_IN,SDRAM_CLK2_N
MLVDS-FPGA=IO_TX_P17,IO_TX_P18,IO_TX_P19,IO_TX_P20,IO_RX_P17,IO_RX_P18,IO_RX_P19,IO_RX_P20,R\E\_DE_TX_P17,R\E\_DE_TX_P18,R\E\_DE_TX_P19,R\E\_DE_TX_P20,R\E\_DE_RX_P17,R\E\_DE_RX_P18,R\E\_DE_RX_P19,R\E\_DE_RX_P20
AMC_JTAG=TRST#,TMS,TDO,TDI,TCK
FMC_J1_JTAG=TCK,TDI,TDO,TMS,TRST_L
SCN=ADR0,ADR1,ADR2,ADR3,ADR4,ADR5,ADR6,RSTN
MLVDS=RX17_P,RX17_N,TX17_N,TX17_P,RX18_P,RX18_N,TX18_N,TX18_P,RX19_P,RX19_N,TX19_N,TX19_P,RX20_P,RX20_N,TX20_N,TX20_P
MLVDS-FPGA=IO_TX_P17,IO_TX_P18,IO_TX_P19,IO_TX_P20,IO_RX_P17,IO_RX_P18,IO_RX_P19,IO_RX_P20,R\E\_DE_TX_P17,R\E\_DE_TX_P18,R\E\_DE_TX_P19,R\E\_DE_TX_P20,R\E\_DE_RX_P17,R\E\_DE_RX_P18,R\E\_DE_RX_P19,R\E\_DE_RX_P20
FMC_J1_POWER=3P3VAUX,12P0V,VIO_B_M2C
PM_control=1V5_VTT_EN,EN_P1V8,EN_P1V2,EN_FMC1_P12V,EN_FMC2_P12V,EN_FMC1_PVADJ,EN_FMC2_PVADJ,EN_FMC1_P3V3,EN_FMC2_P3V3,DAC_VADJ_CSN,DAC_VADJ_SDI,DAC_VADJ_CLK,DAC_VADJ_RSTN,EN_P1V0,PGOOD_P1V0,EN_P3V3
FMC_J1_JTAG=TCK,TDI,TDO,TMS,TRST_L
RTM_LVDS=RTM_LVD0_N,RTM_LVD0_P,RTM_LVD1_N,RTM_LVD1_P,RTM_LVD2_N,RTM_LVD2_P,RTM_LVD3_N,RTM_LVD3_P,RTM_LVD4_N,RTM_LVD4_P,RTM_LVD5_N,RTM_LVD5_P,RTM_LVD6_N,RTM_LVD6_P,RTM_LVD7_N,RTM_LVD7_P
SFP_GTP=SFP1TX_N,SFP1TX_P,SFP1RX_N,SFP1RX_P,SFP2TX_N,SFP2TX_P,SFP2RX_N,SFP2RX_P,SFP3TX_N,SFP3TX_P,SFP3RX_N,SFP3RX_P,SFP4TX_N,SFP4TX_P,SFP4RX_N,SFP4RX_P,SFP5TX_N,SFP5TX_P,SFP5RX_N,SFP5RX_P,SFP6TX_N,SFP6TX_P,SFP6RX_N,SFP6RX_P,SFP7TX_N,SFP7TX_P,SFP7RX_N,SFP7RX_P,SFP8TX_N,SFP8TX_P,SFP8RX_N,SFP8RX_P
DDR=DQM0,DQM1,DQM2,DQM3,DQS0_P,DQS0_N,DQS1_P,DQS1_N,DQS2_P,DQS2_N,DQS3_P,DQS3_N,CE0_N,BA0,BA1,BA2,A0,A1,A2,A3,A4,A5,A6,A7,A8,A9,A10,A11,A12,A13,A14,A15,CAS_N,RAS_N,WE_N,CKE0,D0,D1,D2,D3,D4,D5,D6,D7,D8,D9,D10,D11,D12,D13,D14,D15,D16,D17,D18,D19,D20,D21,D22,D23,D24,D25,D26,D27,D28,D29,D30,D31,ODT0,RST_N,CLK0_N,CLK0_P
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment