#!   /usr/bin/env   python
#    coding: utf8

# Copyright CERN, 2012
# Author: Matthieu Cattin (CERN)
# Licence: GPL v2 or later.
# Website: http://www.ohwr.org
# Last modifications: 8/5/2012


# IRQ controller core registers
IRQ_CONTROLLER_REGS=['IRQ controller registers', {
        'MULTI_IRQ':[0x00, 'Multiple interrupt', {
                'DMA_END':[0, 'End of DMA transfer', 0x1],
                'DMA_ERR':[1, 'Error in DMA transfer', 0x1],
                'ACQ_TRG':[2, 'Acquisition triggered', 0x1],
                'ACQ_END':[3, 'Acquisition finished', 0x1],
                'RESERVED':[4, 'Reserved', 0xFFFFFFF]}],
        'SRC':[0x04, 'Interrupt sources', {
                'DMA_END':[0, 'End of DMA transfer', 0x1],
                'DMA_ERR':[1, 'Error in DMA transfer', 0x1],
                'ACQ_TRG':[2, 'Acquisition triggered', 0x1],
                'ACQ_END':[3, 'Acquisition finished', 0x1],
                'RESERVED':[4, 'Reserved', 0xFFFFFFF]}],
        'EN_MASK':[0x08, 'Interrupt enable mask', {
                'DMA_END':[0, 'End of DMA transfer', 0x1],
                'DMA_ERR':[1, 'Error in DMA transfer', 0x1],
                'ACQ_TRG':[2, 'Acquisition triggered', 0x1],
                'ACQ_END':[3, 'Acquisition finished', 0x1],
                'RESERVED':[4, 'Reserved', 0xFFFFFFF]}]
        }]
