Commit a04f0dc8 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

Made interface simpler and added pulse inhibit on no fixed width pulse side as well

The simpler interface is by means of providing only one pulse and pulse LED port
per channel (both inputa and output). If there's an RTM involved, the splitting
should be done outside the module.

Then, the pulse inhibit is moved outside the g_with_fixed_pwidth block and provided
in the generally synthesizable block, so it gets synthesized regardless of the value
of the g_with_fixed_pwidth generic.
parent 07d56e36
......@@ -175,8 +175,8 @@ architecture behav of conv_pulse_gen is
signal pulse_gf_off_r_edge_p : std_logic;
-- Inhibit first pulse
signal inh_fp_gf_on : std_logic;
signal inh_fp_gf_on_d0 : std_logic;
signal inhibit : std_logic;
signal inhibit_d0 : std_logic;
-- Pulse length counter
signal pulse_cnt : unsigned(f_log2_size(g_duty_cycle_div*g_pwidth)-1 downto 0);
......@@ -189,8 +189,33 @@ architecture behav of conv_pulse_gen is
--==============================================================================
begin
-- Inhibit first pulse process
--
-- This process is needed since when in TTL-BAR repetition mode and when no
-- signal is present on the channel, the external _no signal detect_ block
-- allows a high level on the input line for 100 us. This high level on the
-- line will create a signal that might perturb the operation outside the
-- pulse repeater module, so the pulse generator has to be inhibited until
-- after reset.
p_inhibit_first_pulse : process (clk_i)
begin
if rising_edge(clk_i) then
if (rst_n_i = '0') then
inhibit <= '1';
inhibit_d0 <= '1';
else
inhibit_d0 <= inhibit;
if (inhibit = '1') then
inhibit <= '0';
end if;
end if;
end if;
end process p_inhibit_first_pulse;
gen_without_fixed_pwidth : if (g_with_fixed_pwidth = false) generate
pulse_o <= trig_a_i;
-- Wait for inhibit delay to go LOW, preventing any signal on the line in
-- TTL-BAR
pulse_o <= trig_a_i and (not inhibit_d0);
pulse_err_p_o <= '0';
end generate gen_without_fixed_pwidth;
......@@ -263,26 +288,8 @@ gen_with_fixed_pwidth : if (g_with_fixed_pwidth = true) generate
pulse_gf_off_rst <= '1';
pulse_gf_on <= '0';
pulse_cnt <= (others => '0');
inh_fp_gf_on <= '1';
inh_fp_gf_on_d0 <= '1';
pulse_err_p_o <= '0';
elsif (en_i = '1') then
-- On the first two cycle after reset, the pulse channel needs to be
-- inhibited when the converter board is in TTL-BAR repetition mode,
-- since in this mode, an unconnected channel is HIGH for the first
-- 100us until the "no signal detect" block triggers, and the HIGH level
-- on the line will get interpreted by the trigger delay (due to its reset
-- state) as a rising edge on the line, thus triggering a pulse.
--
-- This is only needed when the glitch filter is ON, since when it is OFF,
-- as the unconnected channel is HIGH for the first 100us, no rising-edge
-- on the channel exists and the p_pulse_gf_off process above is not
-- triggered.
inh_fp_gf_on_d0 <= inh_fp_gf_on;
if inh_fp_gf_on = '1' then
inh_fp_gf_on <= '0';
end if;
-- State machine logic
case state is
---------------------------------------------------------------------
......@@ -300,7 +307,13 @@ gen_with_fixed_pwidth : if (g_with_fixed_pwidth = true) generate
state <= GEN_GF_OFF;
end if;
else
if (trig_gf_on_r_edge_p = '1') and (inh_fp_gf_on_d0 = '0') then
-- wait for inhibit delay to become LOW; this prevents a pulse
-- getting generated when the glitch filter is ON, since the
-- trigger delay above has a reset state of '0', and the high
-- level on the line until the _no signal detect_ block cuts the
-- signal on an unconnected input channel will generate a pulse
-- on the output
if (trig_gf_on_r_edge_p = '1') and (inhibit_d0 = '0') then
state <= GEN_GF_ON;
end if;
end if;
......
......@@ -59,11 +59,13 @@ entity conv_common_gw is
(
-- Number of repeater channels
g_nr_chans : integer := 6;
g_nr_inv_chans : integer := 4;
-- Gateware version
g_gwvers : std_logic_vector(7 downto 0);
-- Generate pulse repetition logic with fixed output pulse width
g_pgen_fixed_width : boolean;
-- Pulse width at pulse generator output (fixed output pulse width only)
-- Pulse width at pulse generator output (valid with fixed output pulse width)
g_pgen_pwidth : natural range 20 to 40 := 24;
-- Duty cycle divider ratio for pulse generator
-- output pulse will be limited to 1/g_pgen_duty_cycle_div
......@@ -94,19 +96,12 @@ entity conv_common_gw is
pulse_rear_oen_o : out std_logic;
inv_oen_o : out std_logic;
-- Front panel channels
pulse_front_i : in std_logic_vector(g_nr_chans-1 downto 0);
pulse_front_o : out std_logic_vector(g_nr_chans-1 downto 0);
inv_i : in std_logic_vector(g_nr_inv_chans-1 downto 0);
inv_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);
-- Rear panel channels
pulse_rear_i : in std_logic_vector(g_nr_chans-1 downto 0);
pulse_rear_o : out std_logic_vector(g_nr_chans-1 downto 0);
-- Pulse inputs
pulse_i : in std_logic_vector(g_nr_chans-1 downto 0);
pulse_o : out std_logic_vector(g_nr_chans-1 downto 0);
-- Channel leds
led_front_o : out std_logic_vector(g_nr_chans-1 downto 0);
led_rear_o : out std_logic_vector(g_nr_chans-1 downto 0);
led_pulse_o : out std_logic_vector(g_nr_chans-1 downto 0);
-- Bicolor LED signals
bicolor_led_state_i : in std_logic_vector(2*g_bicolor_led_columns*g_bicolor_led_lines-1 downto 0);
......@@ -287,7 +282,7 @@ begin
--============================================================================
-- Pulse repetition logic
--============================================================================
trig_a <= pulse_front_i or pulse_rear_i;
trig_a <= pulse_i;
gen_pulse_chan_logic : for i in 0 to g_nr_chans-1 generate
......@@ -346,7 +341,7 @@ begin
port map
(
clk_i => clk_20_i,
rst_n_i => '1',
rst_n_i => rst_20_n,
gf_en_n_i => gf_en_n_i,
......@@ -392,11 +387,8 @@ begin
end generate gen_pulse_chan_logic;
-- Channel output assignments
pulse_front_o <= pulse_outp;
pulse_rear_o <= pulse_outp;
inv_o <= inv_i;
led_front_o <= led_pulse;
led_rear_o <= led_pulse;
pulse_o <= pulse_outp;
led_pulse_o <= led_pulse;
--============================================================================
-- Bicolor LED matrix logic
......
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