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conv-common-gw
Commit 8e8f2a44 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag
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Modified register width for single pulse temperature rise

parent fe95a435
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Showing with 44 additions and 29 deletions
modules/conv_dyn_burst_ctrl.vhd
View file @ 8e8f2a44
......@@ -30,7 +30,7 @@
--==============================================================================
-- last changes:
-- 19-09-2016 Denia Bouhired File created.
-- 11-01-2017 Denia Bouhired File rewritten to use FSM
-- 11-01-2017 Denia Bouhired Small modifications to improve code.
--==============================================================================
-- TODO: -
--==============================================================================
......@@ -51,7 +51,7 @@ entity conv_dyn_burst_ctrl is
-- Fixed pulse width set to 5 clock cycles = 5* 50ns = 250 ns
g_pwidth : natural range 2 to 40 := 5;
-- Scaled temperature rise resulting from single pulse. This number can be defined empirically or derived from temperature measurements on the board.
g_1_pulse_temp_rise :in unsigned (15 downto 0) := x"A410";
g_1_pulse_temp_rise :in unsigned (19 downto 0) := x"0A410";
-- Scaled maximum temperature ceiling before pulse inhibition is necessary to lower temperature
--g_max_temp :in unsigned (39 downto 0) := x"174876E800"
g_max_temp :in unsigned (39 downto 0) := x"00000186A0"--100000
......@@ -82,24 +82,39 @@ entity conv_dyn_burst_ctrl is
architecture behav of conv_dyn_burst_ctrl is
type t_temp_decre is array (0 to 5) of integer;
type t_temp_decre is array (0 to 6) of integer;
-----signals declaration----------
--============================================================================
-- Function and procedure declarations
--============================================================================
function f_temp_resolution (pwidth : natural) return natural is
begin
if pwidth = 5 then --250ns wide pulses
return 5;
else
return 24; --1.2us wide pulses
end if;
end function f_temp_resolution;
signal temp_decre : t_temp_decre := (0, 769, 31, 104, 14, 82);
--signal temp_decre : t_temp_decre := (0, 76923, 3077, 10385, 1434, 8182);
--============================================================================
-- Signal declarations
--============================================================================
signal temp_decre : t_temp_decre := (0, 0, 769, 31, 104, 14, 82);
signal burst_ctrl_rst : std_logic;
signal pulse_train_in : std_logic;
signal temp_rise : unsigned (39 downto 0) ;
signal test : integer ;
signal temp_fall : unsigned (39 downto 0) ;
signal single_cycle_cnt : integer;
signal five_cycle_cnt : integer;
signal n_cycle_cnt : integer;
signal pulse_train_in_d0 : std_logic;
signal pulse_train_in_r_edge_p : std_logic;
signal pulse_train_in_f_edge_p : std_logic;
constant thermal_res : natural := f_temp_resolution (g_pwidth); -- thermal resolution in clock cycles
begin
......@@ -141,31 +156,31 @@ temp_rise_c <= temp_rise; --TODO to delete as output is not really necessary
end process p_pulse_redge_detect;
p_five_cycle_cnt : process(clk_i)
p_n_cycle_cnt : process(clk_i)
begin
if rising_edge(clk_i) then
if rst_n_i = '0' then
single_cycle_cnt <= 1;
five_cycle_cnt <= 1;
n_cycle_cnt <= 1;
else
if pulse_train_in_r_edge_p = '1' then --and burst_ctrl_rst = '0' then
--reset counters in the event of a new pulse
single_cycle_cnt <= 1;
five_cycle_cnt <= 1;
n_cycle_cnt <= 1;
elsif pulse_train_in = '0' then --TODO change condition of if statement, try with falling edge
single_cycle_cnt <= single_cycle_cnt+1;
if single_cycle_cnt = 5 then
if five_cycle_cnt < 6 then
five_cycle_cnt <= five_cycle_cnt + 1;
if single_cycle_cnt = thermal_res then
if n_cycle_cnt < 7 then
n_cycle_cnt <= n_cycle_cnt + 1;
end if;
single_cycle_cnt <= 1;
--temp_fall <= to_unsigned(temp_decre(five_cycle_cnt), 40);
--temp_fall <= to_unsigned(temp_decre(n_cycle_cnt), 40);
end if;
end if;
end if;
end if;
end process p_five_cycle_cnt;
end process p_n_cycle_cnt;
p_thermal_sim : process (clk_i)
......@@ -177,7 +192,7 @@ temp_rise_c <= temp_rise; --TODO to delete as output is not really necessary
burst_err_p_o <= '0';
else
if signed(temp_rise) >= 0 and (signed(temp_rise) <= signed(g_max_temp)) then
if (temp_rise) >= 0 and ((temp_rise) <= (g_max_temp)) then
burst_err_p_o <= '0';
if pulse_train_in_f_edge_p = '1' then --wait until pulse finishes before repetition
......@@ -194,23 +209,23 @@ temp_rise_c <= temp_rise; --TODO to delete as output is not really necessary
end if;
--burst_err_p_o <= '0';
--elsif signed(temp_rise) /= 0 and pulse_train_in = '0' then
elsif signed(temp_rise) /= 0 then --and pulse_burst_i = '0' then --temperature fall between pulses
test <= temp_decre(five_cycle_cnt-1);
if temp_rise > temp_decre(five_cycle_cnt-1) then
temp_rise <= temp_rise - to_unsigned(temp_decre(five_cycle_cnt-1), 40);
elsif (temp_rise) /= 0 then --and pulse_burst_i = '0' then --temperature fall between pulses
test <= temp_decre(n_cycle_cnt-1);
if temp_rise > temp_decre(n_cycle_cnt-1) then
temp_rise <= temp_rise - to_unsigned(temp_decre(n_cycle_cnt-1), 40);
else
temp_rise <= (others => '0');
end if;
end if;
--elsif (signed(temp_rise) > signed(g_max_temp)) and pulse_train_in = '0' then -- and
elsif (signed(temp_rise) > signed(g_max_temp)) then -- and pulse_burst_i = '0' then -- and (pulse_train_in_f_edge_p = '1') then
elsif ((temp_rise) > (g_max_temp)) then -- and pulse_burst_i = '0' then -- and (pulse_train_in_f_edge_p = '1') then
burst_ctrl_rst <= '1';
burst_err_p_o <= '0';
if pulse_train_in_r_edge_p = '1' then
burst_err_p_o <= '1';
end if;
burst_err_p_o <= '0';
temp_rise <= temp_rise - temp_decre(five_cycle_cnt-1);
end if;
temp_rise <= temp_rise - temp_decre(n_cycle_cnt-1);
end if;
end if;
......
top/conv_common_gw.vhd
View file @ 8e8f2a44
......@@ -84,14 +84,14 @@ entity conv_common_gw is
g_pgen_pwidth_sh : natural range 2 to 40 := 5;
-- Duty cycle divider ratio for pulse generator
-- output pulse will be limited to 1/g_pgen_duty_cycle_div
g_pgen_duty_cycle_div : natural range 10 to 300 := 200;
g_pgen_duty_cycle_div : natural range 10 to 300 := 16;--changes maximum frequency to ~52k
g_pgen_duty_cycle_div_sh : natural range 2 to 300 := 2;
-- Pulse generator glitch filter length in number of clk_20_i cycles
g_pgen_gf_len : integer := 4;
-- Burst-mode-specific generics:
-- Temperature rise resulting from 250ns pulse
g_burstctrl_1_pulse_temp_rise :in unsigned (15 downto 0) := x"2670"; -- Check every "g_eval_burst_len" pulses
g_burstctrl_1_pulse_temp_rise :in unsigned (19 downto 0) := x"2670"; -- Check every "g_eval_burst_len" pulses
-- Maximum temperature allowed (scaled)
g_burstctrl_max_temp :in unsigned (39 downto 0) :=x"02540BE400";
......
top/conv_common_gw_pkg.vhd
View file @ 8e8f2a44
......@@ -88,7 +88,7 @@ package conv_common_gw_pkg is
-- Burst-mode-specific generics:
-- Temperature rise resulting from 250ns pulse
g_burstctrl_1_pulse_temp_rise :in unsigned (15 downto 0); -- Check every "g_eval_burst_len" pulses
g_burstctrl_1_pulse_temp_rise :in unsigned (19 downto 0); -- Check every "g_eval_burst_len" pulses
-- Maximum temperature allowed (scaled)
g_burstctrl_max_temp :in unsigned (39 downto 0);
......@@ -298,7 +298,7 @@ package conv_common_gw_pkg is
g_pwidth : natural range 2 to 40 := 5;
-- Temperature rise resulting from with 250ns pulse
g_1_pulse_temp_rise :in unsigned (15 downto 0); -- Check every "g_eval_burst_len" pulses
g_1_pulse_temp_rise :in unsigned (19 downto 0); -- Check every "g_eval_burst_len" pulses
-- Maximum temperature allowed (scaled)
g_max_temp :in unsigned (39 downto 0) := x"174876E800"
......
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