Commit 3e990133 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

Added I2C interface and moved pulse inhibit outside of common g/w

parent a04f0dc8
......@@ -174,10 +174,6 @@ architecture behav of conv_pulse_gen is
signal pulse_gf_off_rst : std_logic;
signal pulse_gf_off_r_edge_p : std_logic;
-- Inhibit first pulse
signal inhibit : std_logic;
signal inhibit_d0 : std_logic;
-- Pulse length counter
signal pulse_cnt : unsigned(f_log2_size(g_duty_cycle_div*g_pwidth)-1 downto 0);
......@@ -189,33 +185,8 @@ architecture behav of conv_pulse_gen is
--==============================================================================
begin
-- Inhibit first pulse process
--
-- This process is needed since when in TTL-BAR repetition mode and when no
-- signal is present on the channel, the external _no signal detect_ block
-- allows a high level on the input line for 100 us. This high level on the
-- line will create a signal that might perturb the operation outside the
-- pulse repeater module, so the pulse generator has to be inhibited until
-- after reset.
p_inhibit_first_pulse : process (clk_i)
begin
if rising_edge(clk_i) then
if (rst_n_i = '0') then
inhibit <= '1';
inhibit_d0 <= '1';
else
inhibit_d0 <= inhibit;
if (inhibit = '1') then
inhibit <= '0';
end if;
end if;
end if;
end process p_inhibit_first_pulse;
gen_without_fixed_pwidth : if (g_with_fixed_pwidth = false) generate
-- Wait for inhibit delay to go LOW, preventing any signal on the line in
-- TTL-BAR
pulse_o <= trig_a_i and (not inhibit_d0);
pulse_o <= trig_a_i;
pulse_err_p_o <= '0';
end generate gen_without_fixed_pwidth;
......@@ -307,13 +278,7 @@ gen_with_fixed_pwidth : if (g_with_fixed_pwidth = true) generate
state <= GEN_GF_OFF;
end if;
else
-- wait for inhibit delay to become LOW; this prevents a pulse
-- getting generated when the glitch filter is ON, since the
-- trigger delay above has a reset state of '0', and the high
-- level on the line until the _no signal detect_ block cuts the
-- signal on an unconnected input channel will generate a pulse
-- on the output
if (trig_gf_on_r_edge_p = '1') and (inhibit_d0 = '0') then
if (trig_gf_on_r_edge_p = '1') then
state <= GEN_GF_ON;
end if;
end if;
......
This diff is collapsed.
Markdown is supported
0% or
You are about to add 0 people to the discussion. Proceed with caution.
Finish editing this message first!
Please register or to comment