Commit 3c3a48f5 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag

commiting modifications of common gateware, now supporting all inv I/O and inv LEDs

parent f034639f
......@@ -41,6 +41,8 @@
--==============================================================================
-- last changes:
-- 2014-07-24 Theodor Stana File created
-- 2016-08-05 Denia Bouhired Moved inv ttl signals inside common gateware
-- and also added support for inv pulse LEDs
--==============================================================================
-- TODO: -
--==============================================================================
......@@ -63,7 +65,7 @@ entity conv_common_gw is
(
-- Number of repeater channels
g_nr_chans : integer := 6;
-- DB Number of inverter channels
-- Number of inverter channels
g_nr_inv_chans : integer := 4;
-- Board ID -- 4-letter ASCII string indicating the board ID
......@@ -118,22 +120,22 @@ entity conv_common_gw is
pulse_rear_oen_o : out std_logic;
inv_oen_o : out std_logic;
-- Pulse inputs
-- Pulse I/O
pulse_i : in std_logic_vector(g_nr_chans-1 downto 0);
pulse_o : out std_logic_vector(g_nr_chans-1 downto 0);
-- DB Inverted pulse I/O
-- Inverted pulse I/O
inv_pulse_i_n : in std_logic_vector(g_nr_inv_chans-1 downto 0);
inv_pulse_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);
-- Channel leds
-- Channel lEDs
-- 26 ms active-high pulse on pulse_o rising edge
led_pulse_o : out std_logic_vector(g_nr_chans-1 downto 0);
-- DB Inverted channel leds
-- Inverted channel lEDs
-- 26 ms active-high pulse on pulse_o rising edge
led_inv_pulse_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);--DB *
led_inv_pulse_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);
-- I2C interface
scl_i : in std_logic;
......@@ -252,10 +254,10 @@ architecture arch of conv_common_gw is
--============================================================================
-- Max. channel count of c_max_nr_chans enforced here:
type t_pulse_led_cnt is array(c_max_nr_chans-1 downto 0)
of unsigned(8 downto 0);
of unsigned(18 downto 0);
type t_inv_pulse_led_cnt is array(g_nr_inv_chans-1 downto 0) -- DB *
of unsigned(8 downto 0); -- DB *
type t_inv_pulse_led_cnt is array(g_nr_inv_chans-1 downto 0)
of unsigned(18 downto 0);
type t_pulse_cnt is array(c_max_nr_chans-1 downto 0)
of unsigned(31 downto 0);
......@@ -288,9 +290,9 @@ architecture arch of conv_common_gw is
signal pulse_outp : std_logic_vector(g_nr_chans-1 downto 0);
signal pulse_outp_d0 : std_logic_vector(g_nr_chans-1 downto 0);
signal pulse_outp_redge_p : std_logic_vector(g_nr_chans-1 downto 0);
signal inv_pulse_outp : std_logic_vector(g_nr_inv_chans-1 downto 0);--DB *
signal inv_pulse_outp_d0 : std_logic_vector(g_nr_inv_chans-1 downto 0);--DB *
signal inv_pulse_outp_fedge_p : std_logic_vector(g_nr_inv_chans-1 downto 0);--DB *
signal inv_pulse_outp : std_logic_vector(g_nr_inv_chans-1 downto 0);
signal inv_pulse_outp_d0 : std_logic_vector(g_nr_inv_chans-1 downto 0);
signal inv_pulse_outp_fedge_p : std_logic_vector(g_nr_inv_chans-1 downto 0);
signal pmisse_p : std_logic_vector(g_nr_chans-1 downto 0);
-- Output enable signals
......@@ -342,8 +344,8 @@ architecture arch of conv_common_gw is
-- LED signals
signal led_pulse : std_logic_vector(g_nr_chans-1 downto 0);
signal led_pulse_cnt : t_pulse_led_cnt;
signal led_inv_pulse : std_logic_vector(g_nr_inv_chans-1 downto 0); -- DB *
signal led_inv_pulse_cnt : t_pulse_led_cnt; -- DB *
signal led_inv_pulse : std_logic_vector(g_nr_inv_chans-1 downto 0);
signal led_inv_pulse_cnt : t_pulse_led_cnt;
signal led_i2c : std_logic;
signal led_i2c_clkdiv : unsigned(18 downto 0);
signal led_i2c_cnt : unsigned( 2 downto 0);
......@@ -421,7 +423,7 @@ begin
generic map
(
-- Reset time: 50ns * 2 * (10**6) = 100 ms
g_reset_time => 2*(10**4) -- DB change back to 6
g_reset_time => 2*(10**6)
)
port map
(
......@@ -648,7 +650,7 @@ end generate gen_pulse_cnt;
end process p_pulse_led;
end generate gen_pulse_chan_logic;
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
---Denia Bouhired 02\08\2016
---Move inv channel reflection to common gw module.
......@@ -696,16 +698,6 @@ end generate gen_pulse_chan_logic;
end generate gen_inv_ttl_leds;
--------------------------------------------------------------------------------
--------------------------------------------------------------------------------
gen_pulse_timetag : if (g_with_pulse_timetag = true) generate
cmp_pulse_timetag : conv_pulse_timetag
......@@ -795,7 +787,7 @@ end generate gen_pulse_timetag;
-- Channel output assignments
pulse_o <= pulse_outp;
led_pulse_o <= led_pulse;
led_inv_pulse_o <= led_inv_pulse; -- DB *
led_inv_pulse_o <= led_inv_pulse;
--============================================================================
-- I2C bridge logic
......
......@@ -64,7 +64,7 @@ package conv_common_gw_pkg is
(
-- Number of repeater channels
g_nr_chans : integer := 6;
g_nr_inv_chans : integer := 4;
g_nr_inv_chans : integer := 4;
-- Board ID -- 4-letter ASCII string indicating the board ID
-- see [1] for example
g_board_id : std_logic_vector(31 downto 0);
......@@ -126,8 +126,8 @@ package conv_common_gw_pkg is
inv_pulse_i_n : in std_logic_vector(g_nr_inv_chans-1 downto 0);
inv_pulse_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);
led_pulse_o : out std_logic_vector(g_nr_chans-1 downto 0);
led_inv_pulse_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);--DB *
led_pulse_o : out std_logic_vector(g_nr_chans-1 downto 0);
led_inv_pulse_o : out std_logic_vector(g_nr_inv_chans-1 downto 0);
-- I2C interface
scl_i : in std_logic;
......
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