Commit 2a1ace18 authored by Denia Bouhired-Ferrag's avatar Denia Bouhired-Ferrag

Typos and alignments

parent 53a7ca64
...@@ -383,7 +383,8 @@ architecture arch of conv_common_gw is ...@@ -383,7 +383,8 @@ architecture arch of conv_common_gw is
signal fwdg_pmisse_bit : std_logic_vector(c_max_nr_chans-1 downto 0); signal fwdg_pmisse_bit : std_logic_vector(c_max_nr_chans-1 downto 0);
signal fwdg_pmisse_bit_rst : std_logic_vector(c_max_nr_chans-1 downto 0); signal fwdg_pmisse_bit_rst : std_logic_vector(c_max_nr_chans-1 downto 0);
signal fwdg_pmisse_bit_rst_ld : std_logic; signal fwdg_pmisse_bit_rst_ld : std_logic;
signal pmisse_bits_or : std_logic; signal pmisse_bits_or : std_logic;
--signals for pulse counters --signals for pulse counters
signal rst_front_cnt : std_logic_vector(c_max_nr_chans-1 downto 0); signal rst_front_cnt : std_logic_vector(c_max_nr_chans-1 downto 0);
...@@ -763,13 +764,11 @@ end generate gen_pulse_cnt_unused_chans; ...@@ -763,13 +764,11 @@ end generate gen_pulse_cnt_unused_chans;
-------------------------------------------------------------------------------- --------------------------------------------------------------------------------
end generate gen_pulse_cnt; end generate gen_pulse_cnt;
--------------------------------------------------------------------------------
-------------------------------------------------------------------------------------------------
-- Instantiate pulse generator + burst controller block for the channel for LONG pulse operation
------------------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------------------
-- CONTINUOUS MODE -- Instantiate pulse generator alone for CONTINUOUS MODE
------------------- -------------------
--Instantiate pulse generator block for continuous operation without burst feature --Instantiate pulse generator block for continuous operation without burst feature
...@@ -782,24 +781,19 @@ end generate gen_pulse_cnt; ...@@ -782,24 +781,19 @@ end generate gen_pulse_cnt;
) )
port map port map
( (
clk_i => clk_20_i, clk_i => clk_20_i,
rst_n_i => rst_20_n, rst_n_i => rst_20_n,
gf_en_n_i => gf_en_n_i,
gf_en_n_i => gf_en_n_i, en_i => '1',
trig_a_i => trig_pgen(i),
en_i => '1', trig_r_edge_p_i => trig_chan_redge_p(i),
trig_f_edge_p_i => trig_chan_fedge_p(i),
trig_a_i => trig_pgen(i), pulse_err_p_o => pulse_outp_err_cont (i),
trig_r_edge_p_i => trig_chan_redge_p(i), pulse_o => pulse_outp_cont(i)
trig_f_edge_p_i => trig_chan_fedge_p(i),
pulse_err_p_o => pulse_outp_err_cont (i),
pulse_o => pulse_outp_cont(i)
); );
---------------------------------------------------------------------------------------------- ----------------------------------------------------------------------------------------------
-- Instantiate pulse generator + burst controller block for the channel for long pulse operation -- Instantiate pulse generator + burst controller block for the channel for LONG pulse operation
------------------------------------------------------------------------------------------------- -------------------------------------------------------------------------------------------------
-- BURST MODE WITH LONG PULSES -- BURST MODE WITH LONG PULSES
---------------------------------- ----------------------------------
...@@ -813,45 +807,39 @@ end generate gen_pulse_cnt; ...@@ -813,45 +807,39 @@ end generate gen_pulse_cnt;
) )
port map port map
( (
clk_i => clk_20_i, clk_i => clk_20_i,
rst_n_i => rst_20_n, rst_n_i => rst_20_n,
gf_en_n_i => gf_en_n_i,
gf_en_n_i => gf_en_n_i, en_i => '1',
trig_a_i => trig_pgen(i),
en_i => '1', trig_r_edge_p_i => trig_chan_redge_p(i),
trig_f_edge_p_i => trig_chan_fedge_p(i),
trig_a_i => trig_pgen(i), pulse_err_p_o => pulse_outp_err_lg_p (i),
trig_r_edge_p_i => trig_chan_redge_p(i), pulse_o => pulse_outp_lg(i),
trig_f_edge_p_i => trig_chan_fedge_p(i), pulse_r_edge_p_o => pulse_r_edge_lg_p(i),
pulse_f_edge_p_o => pulse_f_edge_lg_p(i)
pulse_err_p_o => pulse_outp_err_lg_p (i),
pulse_o => pulse_outp_lg(i),
pulse_r_edge_p_o => pulse_r_edge_lg_p(i),
pulse_f_edge_p_o => pulse_f_edge_lg_p(i)
); );
---------------------------------------------------------------------------------- ----------------------------------------------------------------------------------
-- Instantiate burst control block for the channel -- Instantiate burst control block for the channel
cmp_burst_ctrl_lg : conv_dyn_burst_ctrl cmp_burst_ctrl_lg : conv_dyn_burst_ctrl
generic map generic map
( (
g_pwidth => g_pgen_pwidth_lg, g_pwidth => g_pgen_pwidth_lg,
g_temp_decre_step => g_temp_decre_step_lg, g_temp_decre_step => g_temp_decre_step_lg,
g_1_pulse_temp_rise => g_burstctrl_1_pulse_temp_rise_lg, g_1_pulse_temp_rise => g_burstctrl_1_pulse_temp_rise_lg,
g_max_temp => g_burstctrl_max_temp_lg_sh g_max_temp => g_burstctrl_max_temp_lg_sh
) )
port map port map
( (
clk_i => clk_20_i, clk_i => clk_20_i,
rst_n_i => rst_20_n, rst_n_i => rst_20_n,
en_i => '1', en_i => '1',
pulse_burst_i => pulse_outp_lg(i), pulse_burst_i => pulse_outp_lg(i),
pulse_r_edge_p_i => pulse_r_edge_lg_p(i), pulse_r_edge_p_i => pulse_r_edge_lg_p(i),
pulse_f_edge_p_i => pulse_f_edge_lg_p(i), pulse_f_edge_p_i => pulse_f_edge_lg_p(i),
temp_rise_o => temp_rise_c_lg(i), temp_rise_o => temp_rise_c_lg(i),
pulse_burst_o => burst_outp_lg(i), pulse_burst_o => burst_outp_lg(i),
burst_err_p_o => burst_outp_err_lg_p(i) burst_err_p_o => burst_outp_err_lg_p(i)
); );
---------------------------------------------------------------------------------------------- ----------------------------------------------------------------------------------------------
...@@ -869,22 +857,17 @@ end generate gen_pulse_cnt; ...@@ -869,22 +857,17 @@ end generate gen_pulse_cnt;
) )
port map port map
( (
clk_i => clk_20_i, clk_i => clk_20_i,
rst_n_i => rst_20_n, rst_n_i => rst_20_n,
gf_en_n_i => gf_en_n_i,
gf_en_n_i => gf_en_n_i, en_i => '1',
trig_a_i => trig_pgen(i),
en_i => '1', trig_r_edge_p_i => trig_chan_redge_p(i),
trig_f_edge_p_i => trig_chan_fedge_p(i),
trig_a_i => trig_pgen(i), pulse_err_p_o => pulse_outp_err_sh_p (i),
trig_r_edge_p_i => trig_chan_redge_p(i), pulse_o => pulse_outp_sh(i),
trig_f_edge_p_i => trig_chan_fedge_p(i), pulse_r_edge_p_o => pulse_r_edge_sh_p(i) ,
pulse_f_edge_p_o => pulse_f_edge_sh_p(i)
pulse_err_p_o => pulse_outp_err_sh_p (i),
pulse_o => pulse_outp_sh(i),
pulse_r_edge_p_o => pulse_r_edge_sh_p(i) ,
pulse_f_edge_p_o => pulse_f_edge_sh_p(i)
); );
---------------------------------------------------------------------------------- ----------------------------------------------------------------------------------
...@@ -892,22 +875,22 @@ end generate gen_pulse_cnt; ...@@ -892,22 +875,22 @@ end generate gen_pulse_cnt;
cmp_burst_ctrl_sh : conv_dyn_burst_ctrl cmp_burst_ctrl_sh : conv_dyn_burst_ctrl
generic map generic map
( (
g_pwidth => g_pgen_pwidth_sh, g_pwidth => g_pgen_pwidth_sh,
g_temp_decre_step => g_temp_decre_step_sh, g_temp_decre_step => g_temp_decre_step_sh,
g_1_pulse_temp_rise => g_burstctrl_1_pulse_temp_rise_sh, g_1_pulse_temp_rise => g_burstctrl_1_pulse_temp_rise_sh,
g_max_temp => g_burstctrl_max_temp_lg_sh g_max_temp => g_burstctrl_max_temp_lg_sh
) )
port map port map
( (
clk_i => clk_20_i, clk_i => clk_20_i,
rst_n_i => rst_20_n, rst_n_i => rst_20_n,
en_i => '1', en_i => '1',
pulse_burst_i => pulse_outp_sh(i), pulse_burst_i => pulse_outp_sh(i),
pulse_r_edge_p_i => pulse_r_edge_sh_p(i), pulse_r_edge_p_i => pulse_r_edge_sh_p(i),
pulse_f_edge_p_i => pulse_f_edge_sh_p(i), pulse_f_edge_p_i => pulse_f_edge_sh_p(i),
temp_rise_o => temp_rise_c_sh(i), temp_rise_o => temp_rise_c_sh(i),
pulse_burst_o => burst_outp_sh(i), pulse_burst_o => burst_outp_sh(i),
burst_err_p_o => burst_outp_err_sh_p(i) burst_err_p_o => burst_outp_err_sh_p(i)
); );
---------------------------------------------------------------------- ----------------------------------------------------------------------
......
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