Commit 28a296b2 authored by Theodor-Adrian Stana's avatar Theodor-Adrian Stana

doc: multiboot-regs now sub-section of Appendix A

In addition, the base address of conv-regs has been changed to three hex digits
parent 9fe7ad9d
\subsection{Converter board registers}
\label{subsec:wbgen:reg}
Base address: 0x00000000
Base address: 0x000
{
\rowcolors{2}{white}{gray!25}
\begin{longtable}{l l l p{.5\textwidth}}
......
\section{MultiBoot controller}
\label{app:memmap}
\subsection{MultiBoot controller}
\label{app:multiboot-regs}
Base address: 0x100
{
\rowcolors{2}{white}{gray!25}
\begin{longtable}{l l l p{.5\textwidth}}
......@@ -23,8 +24,9 @@
}
\vspace{11pt}
\subsection{CR -- Control Register}
\label{app:memmap-cr}
\subsubsection{CR -- Control Register}
\label{app:multiboot-regs-cr}
\vspace{11pt}
\noindent
......@@ -83,8 +85,8 @@ IPROG
\end{small}
\end{itemize}
\vspace{11pt}
\subsection{SR -- Status Register}
\label{app:memmap-sr}
\subsubsection{SR -- Status Register}
\label{app:multiboot-regs-sr}
\vspace{11pt}
\noindent
......@@ -136,8 +138,8 @@ WDTO
\end{small}
\end{itemize}
\vspace{11pt}
\subsection{GBBAR -- Golden Bitstream Base Address Register}
\label{app:memmap-gbbar}
\subsubsection{GBBAR -- Golden Bitstream Base Address Register}
\label{app:multiboot-regs-gbbar}
\vspace{11pt}
\noindent
......@@ -175,8 +177,8 @@ BITS
\end{small}
\end{itemize}
\vspace{11pt}
\subsection{MBBAR -- MultiBoot Bitstream Base Address Register}
\label{app:memmap-mbbar}
\subsubsection{MBBAR -- MultiBoot Bitstream Base Address Register}
\label{app:multiboot-regs-mbbar}
\vspace{11pt}
\noindent
......@@ -214,8 +216,8 @@ BITS
\end{small}
\end{itemize}
\vspace{11pt}
\subsection{FAR -- Flash Access Register}
\label{app:memmap-far}
\subsubsection{FAR -- Flash Access Register}
\label{app:multiboot-regs-far}
\vspace{11pt}
\noindent
......
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