doc: add global memory map

This create a little table with all the memory offsets to components. Signed-off-by: Federico Vaga <federico.vaga@cern.ch>

doc: add global memory map
This create a little table with all the memory offsets to components. Signed-off-by: Federico Vaga <federico.vaga@cern.ch>
e208440a · Federico Vaga · 5f780d13 · e208440a · e208440a · e208440a
Commit e208440a authored Jul 27, 2018 by Federico Vaga
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Showing with 36 additions and 5 deletions

index.rst doc/registers/index.rst +32 -5

wbgen_csr.rst doc/registers/wbgen_csr.rst +2 -0

wbgen_lr.rst doc/registers/wbgen_lr.rst +2 -0

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--- a/doc/registers/index.rst
+++ b/doc/registers/index.rst
@@ -4,9 +4,36 @@
 Register Tables
 ===============

-.. toctree::
-   :maxdepth: 1
-   :caption: Contents:
+Memory map from the host point of view:

-   wbgen_csr
-   wbgen_lr
+.. list-table::
+   :header-rows: 1
+   :widths: 50 50
+
+   * - Name
+     - Offset
+
+   * - :ref:`Control Status Register <wbgen_csr>`
+     - 0x00000C00
+
+   * - Configuration Rom
+     - 0x00000E00
+
+   * - Shared Memory
+     - 0x00010000
+
+
+Memory map from the soft-CPU point of view:
+
+.. list-table::
+   :header-rows: 1
+   :widths: 50 50
+
+   * - Name
+     - Offset
+
+   * - :ref:`Local Register <wbgen_lr>`
+     - 0x00100000
+
+   * - Shared Memory
+     - 0x40200000
--- a/doc/registers/wbgen_csr.rst
+++ b/doc/registers/wbgen_csr.rst
+:orphan:
+
 .. _wbgen_csr:

 Control/Status Registers (CSR)

--- a/doc/registers/wbgen_lr.rst
+++ b/doc/registers/wbgen_lr.rst
+:orphan:
+
 .. _wbgen_lr:

 Local Registers (LR)