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A software suite written in Python to help with production tests of PCBs. AKA PTS.
%(red)This pts-base project is used to re-organise the current pts project In the future this project will replace the existing pts project.
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This project contains all the HDL gateware necessary for the FPGA of the WR switch.
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A collection of cores needed in the White Rabbit node and switch. Includes White Rabbit PTP Core (WRPC).
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The open-source HEV ventilator implements the modes PC-A/C, PC-A/C-PRVC, PC-PSV and CPAP More info at the Wiki page
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The aim of this project is to evaluate resources required to run wr switch HDL on Xilinx Ultrascale+ FPGA
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COM Express based PXIe system controller. COM Express Compact Pin-out type 6, 16-lane PCIe GEN3. PXIe trigger line on front-panel. More info at the Wiki page
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A web based commander based on Node.JS for the HDLMake tool.
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The TimIQ system is an IQ modulator allowing to phase shift a radio frequency clock with a resolution of 40 fs and an accuracy of 8 ps. Software.
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High performance pulse and frequency distribution amplifier for time and frequency metrology. The pulse distribution board is an 1:8-channel (1 Hz and up) logic-level distribution amplifier, while the frequency distribution board is an 1:8-channel sine-wave (1-30 MHz) distribution amplifier. Two 1:8 boards fit side-by-sides in a 1U 19" rack enclosure, with either BNC or SMA connectors.
For more information, see the wiki
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FMC nanoFIP is an interface card for the WorldFIP network in an LPC FMC form-factor. More info at the Wiki page
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Hardware design of the PandABox. Includes schematics, PCB layout and manufacturing files.
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A carrier for two low pin count FPGA Mezzanine Cards (VITA 57), analog inputs and fail-safe functionality. It has memory and clocking resources and supports the White Rabbit timing and control network. Stand-alone board for use in a 'pizza-box'. More info at the Wiki page
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Gateware (HDL design) for FMC ADC 400k 18b 4cha iso on SPEC and SVEC carriers.
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Production and functional tests for Conv TTL Blocking. More info at the Wiki page
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Hardware design of Conv TTL Blocking. Includes schematics, PCB layout and manufacturing files. More info at the Wiki page
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Common gateware for the different level conversion circuits.
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