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A software framework for Linux device drivers aimed at supporting controls and data acquisition hardware. ZIO supports sub-nanosecond timestamps, block-oriented input and output and transport of meta-data with the data samples. Users can change the buffer type and trigger type associated with a device at run time, and all of devices, triggers and buffers are easily implemented as add-on modules.
The PF_ZIO implementation, currently in beta status, implements a network interface to the ZIO transport, which allows each I/O channel to generate or receive network frames. Applications see the network of devices and can talk with several of them from the same socket. We support SOCK_STREAM, SOCK_DGRAM and SOCK_RAW.
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A software framework for Linux device drivers aimed at supporting controls and data acquisition hardware. ZIO supports sub-nanosecond timestamps, block-oriented input and output and transport of meta-data with the data samples. Users can change the buffer type and trigger type associated with a device at run time, and all of devices, triggers and buffers are easily implemented as add-on modules.
The PF_ZIO implementation, currently in beta status, implements a network interface to the ZIO transport, which allows each I/O channel to generate or receive network frames. Applications see the network of devices and can talk with several of them from the same socket. We support SOCK_STREAM, SOCK_DGRAM and SOCK_RAW.
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A project to host all software and hardware developments related to testing the White Rabbit switch.
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Development of software for the White Rabbit switch, and in particular the embedded Linux system running in the ARM9 processor. More info at the Wiki page
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This project guides new users to start in the White Rabbit “World” with simple experiments. The starting kit uses two SPEC + FMC-DIO cards. Each node allows basic operations such as input timestamping or programmable output pulse generation. Additionally, specific software and gateware layers allow to use it as a standard network interface card implementing the White Rabbit technology functionalities.
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This is a collection of simple macro implementations for Microsemi's ProASIC3 FPGAs to allow simulating post-synthesis designs using GHDL.
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A White Rabbit Timing Receiver in AMC (Advanced Mezzanine Card, AdvancedMC) format. More info at the Wiki page
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White Rabbit PTP Core software for LatticeMico32. It consists of a software wrapper for running a PTP daemon without an operating system and device drivers for WRPC HDL internals.
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On the Open Hardware Repository you can find projects which use soft-cpu (e.g. mock-turtle, white-rabbit-core, wr-switch). This project offers a toolchain that you can use to compile your code for the soft-cpu target (only LM32 for the time being). The project provides only the necessary makefiles to build the toolchain, so it will be necessary to compile the toolchain.
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Software support for the SVEC board, including kernel and user-space Linux code.
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SDB (Self-describing Bus) allows to enumerate the cores that are live in the current FPGA binary, either from the host computer or from the internal soft-core CPU in the FPGA itself. The project provides the software support and the specification. More info at the Wiki page
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This is a port of an older Linux ptpd to support White Rabbit extensions and run both in hosted and freestanding environment. In the future we plan to replace it with PPSI, which has a much better design, but ptp-noposix is currently working pretty well despite being difficult to maintain.
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Programmable attenuator of RF signals with very high voltage range (50mV – 1000 V) for protecting digitizers against damage by high voltage signals. Four channels with SMA connectors; Three attenuation values: 0, -20, -40 dB; Bandwidth: DC – 2 GHz.
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A software suite written in Python to help with production tests of PCBs. AKA PTS.
%(red)This pts-base project is used to re-organise the current pts project In the future this project will replace the existing pts project.
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A software suite written in Python to help with production tests of PCBs. AKA PTS.
%(red)This pts-base project is used to re-organise the current pts project In the future this project will replace the existing pts project.
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A collection of platform-independent cores such as memories, synchronizer circuits and Wishbone cores.
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Multi-channel Time Interval Counter and fine delay generator. Housed in a 19" module. Research project. More info at the Wiki page
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