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Data centre environmental sensor - Dust, Temperature, Relative Humidity, Fan - Serial 1 channel - version 1. An environmental sensor for Data Centers that continuously measures airborne particle density in high airflow as well as temperature and relative humidity. It can control its fan speed if needed (PWM controlled fans) and monitors FAN rotational speed (tachometer equipped fans) for precise airflow control and monitoring. It is close to maintenance free and can be integrated in compact enclosures (for example tape drive tray or even an ATX PSU case...). More info at the Wiki page

A fully operational stand-alone FMC Delay card based White-Rabbit node which can be initialized and perform periodic calibrations without requiring to be plugged on a PC, reducing final system cost, size and power consumption. More info at the Wiki page

A VHDL core for a PCI slave. The other side behaves like a Wishbone master.

More info at the Wiki page

We have designed an FPGA Mezzanine card (standard FMC/Vita 57) for high-channel-count electrophysiology, with 128 channels (potentially up to 512), based upon Intan Tech's RHA2132 (2 uV rms input-referred noise), sampled at 25kHz 18bit by AD7982. We are basing our design on the reference design provided by Reid Harrison of Intan Tech for their 16-channel evaluation board. The expected cost of the device should be under 5000$.

In order to have an integrated solution we intend to have as default carrier the Opal Kelly Shuttle LX1, an inexpensive USB FMC carrier with an excellent USB controller. The integrated solution will be completed with software on the PC side to grab to disk continuously and/or display in some fashion all 128 channels.

Our status: We have an alpha card. It has passed most tests---we can grab from any channel at 1MS/s. We have an alpha microcode: it grabs from any channel and stores on the PC.

Our current team: Marcelo Magnasco (Rockefeller University, New York), design. Andres Cicuttin (ICTP, Trieste), schematics + fpga Maria Liz Crespo (ICTP, Trieste), fpga Sanjee Abeytunge (MSKCC, New York) layout Nicholas Joseph (RU) Macintosh drivers

A software framework for Linux device drivers aimed at supporting controls and data acquisition hardware. ZIO supports sub-nanosecond timestamps, block-oriented input and output and transport of meta-data with the data samples. Users can change the buffer type and trigger type associated with a device at run time, and all of devices, triggers and buffers are easily implemented as add-on modules.

The PF_ZIO implementation, currently in beta status, implements a network interface to the ZIO transport, which allows each I/O channel to generate or receive network frames. Applications see the network of devices and can talk with several of them from the same socket. We support SOCK_STREAM, SOCK_DGRAM and SOCK_RAW.

Software support for the SPEC board, including kernel and user-space Linux code. The package also include the fmc-bus driver, which is expected to be used by other carriers as well.

A system to characterise large area silicon pad sensors with several hundred channels. It consists of two PCBs. One is an active switching 512-to-1 matrix. The second one is a passive probe card to contact the sensor. Software.

Tester board to test PXIe processor modules. Two variants: slot 2 and slot 10 (system timing slot). More info at the Wiki page

Production and functional tests for PXIe controller COM Express based. More info at the Wiki page

MMC firmware written in C, running on a microcontroller inside the board. Written first for the AFC boards. This firmware is thought to be generic enough so other AMC boards could reuse a large part of it. For now, the only "port" is for the LPC1764 chip, but more are planned.

Hydra is a RISC-V based radiation-tolerant SoC designed to operate up to 500 Gy TID. See the wiki for more details.

This project defines data structures, to be embedded in the FPGA memory address space, to enumerate the devices that have been synthetized in the current design. The same structure is also used as a simple flash file system. AKA Self-Describing Bus (SDB) Specification for Logic Cores. The layout is simple enough to be parsed both by the host and by the internal soft-core, if any.

The documentation is public, and related code is GNU GPL licensed.

The robustness of a White Rabbit Network (WRN) is a broad subject covering methods (HW & SW) which enable to increase overall reliability of a WR-based system. This includes Forward Error Correction (FEC), Quality of Service (QoS) assurance, support of network redundancy, proper network design, thorough diagnostics, and increasing the reliability of network components (i.e. switches, nodes). Here, these methods are described and their implementation sources gathered.

The VFC is a VME carrier for two VITA 57 (FMC) mezzanines. For more details please refer to the wiki pages. Obsolete project. Replaced by VFC-HD.

This project focuses on performing with high precision the core WR PTP calculations in fixed-point arithmetic. This will ensure uniform input parameters, code and precision across all WR implementations.

This is a collection of simple macro implementations for Microsemi's ProASIC3 FPGAs to allow simulating post-synthesis designs using GHDL.

Configuration and boot software required to start up the SPEC7 board

Test. May be deleted.

Production and functional tests for FMC TDC 1ns 5cha.