A cute-wr is a compact WR-node implementation with minimum components required. The initial design is derived from SPEC, but would work in an opposite manner as a FMC wr-nic, providing 2 DIO channels, external CLK input, EEPROM, JTAG, RS232, and expandable IOs through FMC connector. The gateware and software of cute-wr would also keep maximum compatibility with SPEC. Project is obsolete. See cute-wr-dp for a similar board.

DI/OT Igloo2-based System Board for radiation-exposed DI/OT applications. More info at the Wiki page

Gateware (HDL design) for nanoFIP.

DI/OT Zynq Ultrascale-based System Board with White Rabbit support. More info at the Wiki page

An FPGA Mezzanine Card (FMC) with a Time to Digital Converter chip to perform one-shot sub-nanosecond time interval measurements. Commercially available. More info at the Wiki page

This project covers the hardware development of version 4 of the White Rabbit switch (WRS-v4). More info at the Wiki page

A simple 4-lane PCIe carrier for a FPGA Mezzanine Card (VITA 57). It supports the White Rabbit timing and control network. More info at the Wiki page

Distributed I/O Tier - these are electronics modules installed close to a particle accelerator in radiation-exposed or radiation-free areas controlled by the master in the Front-end tier over the fieldbus. These are usually FPGA-based boards sampling digital and analog inputs, driving outputs and performing various safety critical operations. More info at the Wiki page

The Electronics Design project gives helpful entry points for electronics engineers. VHDL coding, design reviews, components, production, assembly and testing are some subjects. More info at the Wiki page

This project defines data structures, to be embedded in the FPGA memory address space, to enumerate the devices that have been synthetized in the current design. The same structure is also used as a simple flash file system. AKA Self-Describing Bus (SDB) Specification for Logic Cores. The layout is simple enough to be parsed both by the host and by the internal soft-core, if any.

The documentation is public, and related code is GNU GPL licensed.

Programmable attenuator of RF signals with very high voltage range (50mV – 1000 V) for protecting digitizers against damage by high voltage signals. Four channels with SMA connectors; Three attenuation values: 0, -20, -40 dB; Bandwidth: DC – 2 GHz.

PCIe to VME bridge. More info at the Wiki page

The OPT ADC 10k 32b 1cha is a single channel 10kSPS 32 bit ADC card in the format defined by the CERN TE-EPC group for use with the Function Generator Controller (FGC 3.2) . It is also known under the name HPM7177.

TiCkS is a flexible White Rabbit based time-stamping board. It is based on the SPEC board developed for the CTA collaboration. It provides an interface to a CTA camera (Inputs: Read-out Trigger signals, Busy Trigger), (Outputs: PPS signal , 10MHz clock, External trigger signal).

More info at the Wiki page

A simple VME64x carrier for two high pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Follow-up of SVEC.

A simple VME64x carrier for two low pin count FPGA Mezzanine Cards (VITA 57). It has memory and clocking resources and supports the White Rabbit timing and control network. Commercially available. More info at the Wiki page

A robust handheld low-level UV intensity meter. Readings from 0 - 1999 mMED/h. Developed in collaboration with the French Enfants de la Lune association. More info at the Wiki page

Tool for generating multi-purpose makefiles for FPGA projects.

Main features:

makefile generation for: fetching modules from repositories simulating HDL projects synthesizing HDL projects synthesizing projects remotely (keeping your local resources free) generating multi-vendor project files (no clicking in the IDE!) many other things without involving make and makefiles

Hdlmake supports modularity, scalability, revision control systems. Hdlmake can be run on any Linux or Windows machine with any HDL More info at the Wiki page

FMC-PROFINET is a PROFINET device (“slave”) card based on the Siemens ERTEC200 chip in the FMC-LPC form-factor.