Commit bb21a98d authored by Dave Newbold's avatar Dave Newbold

Adding LED control

parent 2b342268
...@@ -59,11 +59,12 @@ end top; ...@@ -59,11 +59,12 @@ end top;
architecture rtl of top is architecture rtl of top is
signal clk_ipb, rst_ipb, clk125, rst125, nuke, soft_rst, userled, clk200: std_logic; signal clk_ipb, rst_ipb, clk125, rst125, nuke, soft_rst, userled, clk200, stealth_mode: std_logic;
signal ipb_out: ipb_wbus; signal ipb_out: ipb_wbus;
signal ipb_in: ipb_rbus; signal ipb_in: ipb_rbus;
signal debug: std_logic_vector(3 downto 0); signal debug: std_logic_vector(3 downto 0);
signal si5326_sda_o, analog_sda_o: std_logic; signal si5326_sda_o, analog_sda_o: std_logic;
signal infra_leds: std_logic_vector(1 downto 0);
begin begin
...@@ -85,7 +86,7 @@ begin ...@@ -85,7 +86,7 @@ begin
clk200 => clk200, clk200 => clk200,
nuke => nuke, nuke => nuke,
soft_rst => soft_rst, soft_rst => soft_rst,
leds => leds, leds => iinfra_leds,
debug => open, debug => open,
mac_addr(47 downto 4) => MAC_ADDR(47 downto 4), mac_addr(47 downto 4) => MAC_ADDR(47 downto 4),
mac_addr(3 downto 0) => dip_sw, mac_addr(3 downto 0) => dip_sw,
...@@ -94,6 +95,8 @@ begin ...@@ -94,6 +95,8 @@ begin
ipb_in => ipb_in, ipb_in => ipb_in,
ipb_out => ipb_out ipb_out => ipb_out
); );
leds <= infra_leds when stealth_mode = '0' else "00";
sfp_tx_disable <= '0'; sfp_tx_disable <= '0';
sfp_scl <= '1'; sfp_scl <= '1';
...@@ -110,6 +113,7 @@ begin ...@@ -110,6 +113,7 @@ begin
clk200 => clk200, clk200 => clk200,
nuke => nuke, nuke => nuke,
soft_rst => soft_rst, soft_rst => soft_rst,
stealth_mode => stealth_mode,
userleds => leds_c, userleds => leds_c,
si5326_scl => si5326_scl, si5326_scl => si5326_scl,
si5326_sda_o => si5326_sda_o, si5326_sda_o => si5326_sda_o,
......
...@@ -43,11 +43,12 @@ end top; ...@@ -43,11 +43,12 @@ end top;
architecture rtl of top is architecture rtl of top is
signal clk_ipb, rst_ipb, clk125, rst125, nuke, soft_rst, userled, clk200: std_logic; signal clk_ipb, rst_ipb, clk125, rst125, nuke, soft_rst, userled, clk200, stealth_mode: std_logic;
signal ipb_out: ipb_wbus; signal ipb_out: ipb_wbus;
signal ipb_in: ipb_rbus; signal ipb_in: ipb_rbus;
signal debug: std_logic_vector(3 downto 0); signal debug: std_logic_vector(3 downto 0);
signal addrn: std_logic_vector(7 downto 0); signal addrn: std_logic_vector(7 downto 0);
signal infra_leds: std_logic_vector(1 downto 0);
begin begin
...@@ -71,7 +72,7 @@ begin ...@@ -71,7 +72,7 @@ begin
clk200 => clk200, clk200 => clk200,
nuke => nuke, nuke => nuke,
soft_rst => soft_rst, soft_rst => soft_rst,
leds => leds(1 downto 0), leds => infra_leds,
debug => open, debug => open,
mac_addr(47 downto 8) => MAC_ADDR(47 downto 8), mac_addr(47 downto 8) => MAC_ADDR(47 downto 8),
mac_addr(7 downto 0) => addrn, mac_addr(7 downto 0) => addrn,
...@@ -81,6 +82,8 @@ begin ...@@ -81,6 +82,8 @@ begin
ipb_out => ipb_out ipb_out => ipb_out
); );
leds <= infra_leds when stealth_mode = '0' else "00";
payload: entity work.payload payload: entity work.payload
port map( port map(
ipb_clk => clk_ipb, ipb_clk => clk_ipb,
...@@ -92,6 +95,7 @@ begin ...@@ -92,6 +95,7 @@ begin
clk200 => clk200, clk200 => clk200,
nuke => nuke, nuke => nuke,
soft_rst => soft_rst, soft_rst => soft_rst,
stealth_mode => stealth_mode,
userleds => leds_c, userleds => leds_c,
addr => addrn, addr => addrn,
sel => sel, sel => sel,
......
...@@ -5,9 +5,9 @@ ...@@ -5,9 +5,9 @@
<node id="rst_mmcm" mask="0x4"/> <node id="rst_mmcm" mask="0x4"/>
<node id="rst_idelayctrl" mask="0x8"/> <node id="rst_idelayctrl" mask="0x8"/>
<node id="sync_mode" mask="0x10"/> <node id="sync_mode" mask="0x10"/>
<node id="stealth_mode" mask="0x20"/>
<node id="chan" mask="0xff00"/> <node id="chan" mask="0xff00"/>
<node id="io_sel" mask="0x1f000000"/> <node id="io_sel" mask="0x1f000000"/>
<node id="leds" mask="0xe0000000"/>
</node> </node>
<node id="id" address="0x2"/> <node id="id" address="0x2"/>
<node id="stat" address="0x3"> <node id="stat" address="0x3">
......
...@@ -26,6 +26,7 @@ entity payload is ...@@ -26,6 +26,7 @@ entity payload is
clk200: in std_logic; clk200: in std_logic;
nuke: out std_logic; nuke: out std_logic;
soft_rst: out std_logic; soft_rst: out std_logic;
stealth_mode: out std_logic;
userleds: out std_logic_vector(2 downto 0); userleds: out std_logic_vector(2 downto 0);
addr: in std_logic_vector(7 downto 0); addr: in std_logic_vector(7 downto 0);
sel: out std_logic_vector(4 downto 0); sel: out std_logic_vector(4 downto 0);
...@@ -56,9 +57,10 @@ architecture rtl of payload is ...@@ -56,9 +57,10 @@ architecture rtl of payload is
signal ctrl: ipb_reg_v(0 downto 0); signal ctrl: ipb_reg_v(0 downto 0);
signal stat: ipb_reg_v(1 downto 0); signal stat: ipb_reg_v(1 downto 0);
signal clk40: std_logic; signal clk40: std_logic;
signal ctrl_rst_mmcm, locked, idelayctrl_rdy, ctrl_rst_idelayctrl: std_logic; signal ctrl_rst_mmcm, locked, idelayctrl_rdy, ctrl_rst_idelayctrl , ctrl_stealth_mode: std_logic;
signal ctrl_chan: std_logic_vector(7 downto 0); signal ctrl_chan: std_logic_vector(7 downto 0);
signal chan_err: std_logic; signal chan_err: std_logic;
signal daq_leds: std_logic_vector(2 downto 0);
begin begin
...@@ -100,9 +102,13 @@ begin ...@@ -100,9 +102,13 @@ begin
nuke <= ctrl(0)(1); nuke <= ctrl(0)(1);
ctrl_rst_mmcm <= ctrl(0)(2); ctrl_rst_mmcm <= ctrl(0)(2);
ctrl_rst_idelayctrl <= ctrl(0)(3); ctrl_rst_idelayctrl <= ctrl(0)(3);
ctrl_stealth_mode <= ctrl(0)(5);
ctrl_chan <= ctrl(0)(15 downto 8); ctrl_chan <= ctrl(0)(15 downto 8);
sel <= ctrl(0)(28 downto 24); sel <= ctrl(0)(28 downto 24);
stealth_mode <= ctrl_stealth_mode;
userleds <= daq_leds when ctrl_stealth_mode = '0' else (others => '0');
-- Required for timing alignment at inputs -- Required for timing alignment at inputs
idelctrl: IDELAYCTRL -- Docs claim this should be replicated as necessary idelctrl: IDELAYCTRL -- Docs claim this should be replicated as necessary
...@@ -148,7 +154,7 @@ begin ...@@ -148,7 +154,7 @@ begin
sync_in => sync_in, sync_in => sync_in,
trig_in => trig_in, trig_in => trig_in,
trig_out => trig_out, trig_out => trig_out,
led_out => userleds, led_out => daq_leds,
chan => ctrl_chan, chan => ctrl_chan,
chan_err => chan_err, chan_err => chan_err,
d_p => adc_d_p, d_p => adc_d_p,
......
...@@ -5,6 +5,7 @@ ...@@ -5,6 +5,7 @@
<node id="rst_mmcm" mask="0x4"/> <node id="rst_mmcm" mask="0x4"/>
<node id="rst_idelayctrl" mask="0x8"/> <node id="rst_idelayctrl" mask="0x8"/>
<node id="sync_mode" mask="0x10"/> <node id="sync_mode" mask="0x10"/>
<node id="stealth_mode" mask="0x20"/>
<node id="chan" mask="0xff00"/> <node id="chan" mask="0xff00"/>
<node id="board_id" mask="0xff0000"/> <node id="board_id" mask="0xff0000"/>
</node> </node>
......
...@@ -26,6 +26,7 @@ entity payload is ...@@ -26,6 +26,7 @@ entity payload is
clk200: in std_logic; clk200: in std_logic;
nuke: out std_logic; nuke: out std_logic;
soft_rst: out std_logic; soft_rst: out std_logic;
stealth_mode: out std_logic;
userleds: out std_logic_vector(3 downto 0); userleds: out std_logic_vector(3 downto 0);
si5326_scl: out std_logic; si5326_scl: out std_logic;
si5326_sda_o: out std_logic; si5326_sda_o: out std_logic;
...@@ -70,10 +71,11 @@ architecture rtl of payload is ...@@ -70,10 +71,11 @@ architecture rtl of payload is
signal stat: ipb_reg_v(1 downto 0); signal stat: ipb_reg_v(1 downto 0);
signal clk40: std_logic; signal clk40: std_logic;
signal sync_in, trig_in, trig_out: std_logic; signal sync_in, trig_in, trig_out: std_logic;
signal ctrl_rst_mmcm, locked, idelayctrl_rdy, ctrl_rst_idelayctrl, ctrl_sync_mode: std_logic; signal ctrl_rst_mmcm, locked, idelayctrl_rdy, ctrl_rst_idelayctrl, ctrl_sync_mode, ctrl_stealth_mode: std_logic;
signal ctrl_chan: std_logic_vector(7 downto 0); signal ctrl_chan: std_logic_vector(7 downto 0);
signal ctrl_board_id: std_logic_vector(7 downto 0); signal ctrl_board_id: std_logic_vector(7 downto 0);
signal chan_err, led: std_logic; signal chan_err, led: std_logic;
signal daq_leds: std_logic_vector(2 downto 0);
begin begin
...@@ -116,11 +118,13 @@ begin ...@@ -116,11 +118,13 @@ begin
ctrl_rst_mmcm <= ctrl(0)(2); ctrl_rst_mmcm <= ctrl(0)(2);
ctrl_rst_idelayctrl <= ctrl(0)(3); ctrl_rst_idelayctrl <= ctrl(0)(3);
ctrl_sync_mode <= ctrl(0)(4); ctrl_sync_mode <= ctrl(0)(4);
ctrl_stealth_mode <= ctrl(0)(5);
ctrl_chan <= ctrl(0)(15 downto 8); ctrl_chan <= ctrl(0)(15 downto 8);
ctrl_board_id <= ctrl(0)(23 downto 16); ctrl_board_id <= ctrl(0)(23 downto 16);
userleds(3) <= '0'; stealth_mode <= ctrl_stealth_mode;
userleds <= '0' & daq_leds when ctrl_stealth_mode = '0' else (others => '0');
-- Required for timing alignment at inputs -- Required for timing alignment at inputs
idelctrl: IDELAYCTRL -- Docs claim this should be replicated as necessary idelctrl: IDELAYCTRL -- Docs claim this should be replicated as necessary
...@@ -206,7 +210,7 @@ begin ...@@ -206,7 +210,7 @@ begin
sync_in => sync_in, sync_in => sync_in,
trig_in => trig_in, trig_in => trig_in,
trig_out => trig_out, trig_out => trig_out,
led_out => userleds(2 downto 0), led_out => daq_leds(2 downto 0),
chan => ctrl_chan, chan => ctrl_chan,
chan_err => chan_err, chan_err => chan_err,
d_p => adc_d_p, d_p => adc_d_p,
......
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