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eurocard
euro-adc-65m-14b-40cha
euro-adc-65m-14b-40cha-gw
Commits
b25b9f8c
Commit
b25b9f8c
authored
Jun 08, 2017
by
Dave Newbold
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Adding trigger self-cancel
parent
83a4db91
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2 changed files
with
4 additions
and
4 deletions
+4
-4
sc_trig_gen_or.vhd
components/solid/firmware/hdl/sc_trig_gen_or.vhd
+2
-2
sc_trig_gen_random.vhd
components/solid/firmware/hdl/sc_trig_gen_random.vhd
+2
-2
No files found.
components/solid/firmware/hdl/sc_trig_gen_or.vhd
View file @
b25b9f8c
...
...
@@ -40,7 +40,7 @@ architecture rtl of sc_trig_gen_or is
begin
mark_del
<=
mark_del
(
DELAY
-
2
downto
0
)
&
mark
when
rising_edge
(
clk
);
v
<=
(
v
or
(
or_reduce
(
chan_trig
(
TBIT
))
and
mark_del
(
DELAY
-
1
)))
and
not
(
ack
or
not
en
)
when
rising_edge
(
clk
);
valid
<=
v
;
v
<=
(
(
v
and
not
mark_del
(
DELAY
-
1
))
or
(
or_reduce
(
chan_trig
(
TBIT
))
and
mark_del
(
DELAY
-
1
)))
and
not
(
ack
or
not
en
)
when
rising_edge
(
clk
);
valid
<=
v
and
not
ack
;
end
rtl
;
components/solid/firmware/hdl/sc_trig_gen_random.vhd
View file @
b25b9f8c
...
...
@@ -55,7 +55,7 @@ begin
rtrig
<=
((
not
mode
(
0
)
and
not
or_reduce
(
rand
(
mask
'range
)
and
mask
))
or
(
mode
(
0
)
and
not
or_reduce
(
sctr
(
BLK_RADIX
+
mask
'left
downto
BLK_RADIX
)
and
mask
)))
and
mode
(
1
);
v
<=
(
v
or
((
rtrig
or
force_c
)
and
mark
))
and
not
(
ack
or
not
en
)
when
rising_edge
(
clk
);
valid
<=
v
;
v
<=
(
(
v
and
not
mark_del
(
DELAY
-
1
))
or
((
rtrig
or
force_c
)
and
mark
))
and
not
(
ack
or
not
en
)
when
rising_edge
(
clk
);
valid
<=
v
and
not
ack
;
end
rtl
;
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