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euro-adc-65m-14b-40cha
euro-adc-65m-14b-40cha-gw
Commits
3f1de9cc
Commit
3f1de9cc
authored
Jun 15, 2017
by
Dave Newbold
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Addrtab update
parent
4ca2c9b4
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1 changed file
with
11 additions
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26 deletions
+11
-26
ipbus_decode_top.vhd
projects/64ch/firmware/hdl/ipbus_decode_top.vhd
+11
-26
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projects/64ch/firmware/hdl/ipbus_decode_top.vhd
View file @
3f1de9cc
...
...
@@ -17,16 +17,11 @@ package ipbus_decode_top is
subtype
ipbus_sel_t
is
std_logic_vector
(
IPBUS_SEL_WIDTH
-
1
downto
0
);
function
ipbus_sel_top
(
addr
:
in
std_logic_vector
(
31
downto
0
))
return
ipbus_sel_t
;
-- START automatically generated VHDL the Thu Jun
8 10:16:08
2017
-- START automatically generated VHDL the Thu Jun
15 21:26:57
2017
constant
N_SLV_CSR
:
integer
:
=
0
;
constant
N_SLV_CHAN
:
integer
:
=
1
;
constant
N_SLV_IO
:
integer
:
=
2
;
constant
N_SLV_TIMING
:
integer
:
=
3
;
constant
N_SLV_FAKE
:
integer
:
=
4
;
constant
N_SLV_TLINK
:
integer
:
=
5
;
constant
N_SLV_TRIG
:
integer
:
=
6
;
constant
N_SLV_ROC
:
integer
:
=
7
;
constant
N_SLAVES
:
integer
:
=
8
;
constant
N_SLV_IO
:
integer
:
=
1
;
constant
N_SLV_DAQ
:
integer
:
=
2
;
constant
N_SLAVES
:
integer
:
=
3
;
-- END automatically generated VHDL
...
...
@@ -38,23 +33,13 @@ package body ipbus_decode_top is
variable
sel
:
ipbus_sel_t
;
begin
-- START automatically generated VHDL the Thu Jun 8 10:16:08 2017
if
std_match
(
addr
,
"------------------------0000----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_CSR
,
IPBUS_SEL_WIDTH
));
-- csr / base 0x00000000 / mask 0x000000f0
elsif
std_match
(
addr
,
"------------------------0001----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_CHAN
,
IPBUS_SEL_WIDTH
));
-- chan / base 0x00000010 / mask 0x000000f0
elsif
std_match
(
addr
,
"------------------------001-----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_IO
,
IPBUS_SEL_WIDTH
));
-- io / base 0x00000020 / mask 0x000000e0
elsif
std_match
(
addr
,
"------------------------0100----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_TIMING
,
IPBUS_SEL_WIDTH
));
-- timing / base 0x00000040 / mask 0x000000f0
elsif
std_match
(
addr
,
"------------------------0101----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_FAKE
,
IPBUS_SEL_WIDTH
));
-- fake / base 0x00000050 / mask 0x000000f0
elsif
std_match
(
addr
,
"------------------------0110----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_TLINK
,
IPBUS_SEL_WIDTH
));
-- tlink / base 0x00000060 / mask 0x000000f0
elsif
std_match
(
addr
,
"------------------------100-----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_TRIG
,
IPBUS_SEL_WIDTH
));
-- trig / base 0x00000080 / mask 0x000000e0
elsif
std_match
(
addr
,
"------------------------101-----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_ROC
,
IPBUS_SEL_WIDTH
));
-- roc / base 0x000000a0 / mask 0x000000e0
-- START automatically generated VHDL the Thu Jun 15 21:26:57 2017
if
std_match
(
addr
,
"-----------------------0--0-----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_CSR
,
IPBUS_SEL_WIDTH
));
-- csr / base 0x00000000 / mask 0x00000120
elsif
std_match
(
addr
,
"-----------------------0--1-----"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_IO
,
IPBUS_SEL_WIDTH
));
-- io / base 0x00000020 / mask 0x00000120
elsif
std_match
(
addr
,
"-----------------------1--------"
)
then
sel
:
=
ipbus_sel_t
(
to_unsigned
(
N_SLV_DAQ
,
IPBUS_SEL_WIDTH
));
-- daq / base 0x00000100 / mask 0x00000100
-- END automatically generated VHDL
else
...
...
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