wb_fmc150_port

FMC ADC/DAC interface registers

FMC ADC/DAC interface

Contents:

1. Memory map summary
2. HDL symbol
3. Register description
3.1. Input Flags for Pulsing Registers
3.2. Input Flags for FMC150
3.3. Address for Chips on FMC150
3.4. Data In for Chips on FMC150
3.5. Chipselect for Chips on FMC150
3.6. ADC Delay
3.7. Data Out From Chips on FMC150
3.8. Flags out from Chips on FMC150

1. Memory map summary

H/W Address Type Name VHDL/Verilog prefix C prefix
0x0 REG Input Flags for Pulsing Registers fmc150_flgs_pulse FLGS_PULSE
0x1 REG Input Flags for FMC150 fmc150_flgs_in FLGS_IN
0x2 REG Address for Chips on FMC150 fmc150_addr ADDR
0x3 REG Data In for Chips on FMC150 fmc150_data_in DATA_IN
0x4 REG Chipselect for Chips on FMC150 fmc150_cs CS
0x5 REG ADC Delay fmc150_adc_dly ADC_DLY
0x6 REG Data Out From Chips on FMC150 fmc150_data_out DATA_OUT
0x7 REG Flags out from Chips on FMC150 fmc150_flgs_out FLGS_OUT

2. HDL symbol

rst_n_i Input Flags for Pulsing Registers:
clk_sys_i fmc150_flgs_pulse_o
wb_adr_i[2:0]  
wb_dat_i[31:0] Input Flags for FMC150:
wb_dat_o[31:0] fmc150_flgs_in_spi_rw_o
wb_cyc_i fmc150_flgs_in_ext_clk_o
wb_sel_i[3:0]  
wb_stb_i Address for Chips on FMC150:
wb_we_i fmc150_addr_o[15:0]
wb_ack_o  
wb_stall_o Data In for Chips on FMC150:
fmc150_data_in_o[31:0]
 
Chipselect for Chips on FMC150:
fmc150_cs_cdce72010_o
fmc150_cs_ads62p49_o
fmc150_cs_dac3283_o
fmc150_cs_amc7823_o
 
ADC Delay:
fmc150_adc_dly_str_o[4:0]
fmc150_adc_dly_cha_o[4:0]
fmc150_adc_dly_chb_o[4:0]
 
Data Out From Chips on FMC150:
fmc150_data_out_i[31:0]
 
Flags out from Chips on FMC150:
fmc150_flgs_out_spi_busy_i
fmc150_flgs_out_pll_status_i
fmc150_flgs_out_adc_clk_locked_i
fmc150_flgs_out_fmc_prst_i

3. Register description

3.1. Input Flags for Pulsing Registers

HW prefix: fmc150_flgs_pulse
HW address: 0x0
C prefix: FLGS_PULSE
C offset: 0x0
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - - - - - FLGS_PULSE

3.2. Input Flags for FMC150

HW prefix: fmc150_flgs_in
HW address: 0x1
C prefix: FLGS_IN
C offset: 0x4
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - - - - EXT_CLK SPI_RW

3.3. Address for Chips on FMC150

HW prefix: fmc150_addr
HW address: 0x2
C prefix: ADDR
C offset: 0x8
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
ADDR[15:8]
7 6 5 4 3 2 1 0
ADDR[7:0]

3.4. Data In for Chips on FMC150

HW prefix: fmc150_data_in
HW address: 0x3
C prefix: DATA_IN
C offset: 0xc
31 30 29 28 27 26 25 24
DATA_IN[31:24]
23 22 21 20 19 18 17 16
DATA_IN[23:16]
15 14 13 12 11 10 9 8
DATA_IN[15:8]
7 6 5 4 3 2 1 0
DATA_IN[7:0]

3.5. Chipselect for Chips on FMC150

HW prefix: fmc150_cs
HW address: 0x4
C prefix: CS
C offset: 0x10
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - - AMC7823 DAC3283 ADS62P49 CDCE72010

3.6. ADC Delay

HW prefix: fmc150_adc_dly
HW address: 0x5
C prefix: ADC_DLY
C offset: 0x14
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - CHB[4:0]
15 14 13 12 11 10 9 8
- - - CHA[4:0]
7 6 5 4 3 2 1 0
- - - STR[4:0]

3.7. Data Out From Chips on FMC150

HW prefix: fmc150_data_out
HW address: 0x6
C prefix: DATA_OUT
C offset: 0x18
31 30 29 28 27 26 25 24
DATA_OUT[31:24]
23 22 21 20 19 18 17 16
DATA_OUT[23:16]
15 14 13 12 11 10 9 8
DATA_OUT[15:8]
7 6 5 4 3 2 1 0
DATA_OUT[7:0]

3.8. Flags out from Chips on FMC150

HW prefix: fmc150_flgs_out
HW address: 0x7
C prefix: FLGS_OUT
C offset: 0x1c
31 30 29 28 27 26 25 24
- - - - - - - -
23 22 21 20 19 18 17 16
- - - - - - - -
15 14 13 12 11 10 9 8
- - - - - - - -
7 6 5 4 3 2 1 0
- - - - FMC_PRST ADC_CLK_LOCKED PLL_STATUS SPI_BUSY