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bootloader-v2
release version 2 of the bootloader
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gateware-v2.0
Official release of gateware v2.0 (golden + bootloader)
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gateware-v3.0
Release v3.0 of the bootloader bitstream.
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gateware-v3.0rc
V3.0 bootloader/flasher release candidate.
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v0.8.0
** [0.8.0] - 2017-10-12 *** Added - char device to program the Application FPGA - sysfs attribute to unlock programming - documentation!
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v0.9.0
** [0.9.0] - 2017-10-13 *** Added - unittest *** Fixes - add missing header in the repository - add delay in the unlocking sequence
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v1.4.0
[1.4.0] 2019-09-11 ================== Added ----- - [hdl] svec-base IP-core to support SVEC based designs - [sw] Support for svec-base IP-core - [sw] Support for FMC
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v1.4.1
[1.4.1] 2019-10-15 ================== Fixed ----- - [sw] fix building system failure
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v1.4.10
[1.4.10] 2020-05-12 ================== Added ----- - [hdl] metadata source-id automatic assignment - [hdl] add option to consider AM in VME slave decoder Fixed ----- - [hdl] fix typos when ddr is not configured. This froze the board when reading a ddr data register. Changed ------- - [sw] Linux device hierarchy seen in sysfs. It is incompatible but tools, today do not rely in this. So we take the freedom to change it without a major release. - [sw] on device removal the IRQ vector number in the CR/CSR space is set to 0x0
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v1.4.11
[1.4.11] 2020-05-20 =================== Added ----- - [hdl] export DDMTD clock output
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v1.4.12
[1.4.12] 2020-06-03 =================== Added ----- - [hdl] ignore autogenerated files to build metadata (otherwise the repository is always marked as dirty) Fixed ----- - [sw] impossibility of loading application because of wrong address space
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v1.4.2
[1.4.2] 2019-10-17 ================== Changed ----- - [sw] show application metadata in debugfs
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v1.4.3
[1.4.3] 2019-10-17 ================== Added ----- - [doc] sphinx documentation
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v1.4.4
[1.4.4] 2019-12-13 ================== Fixed ----- - [sw] soft dependency from i2c_ohwr to i2c-ocores
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v1.4.5
[1.4.5] 2019-12-16 ================== Fixed ----- - [sw] suggested fixed reported by checkpatch and coccicheck
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v1.4.6
[1.4.5] 2019-12-16 ================== Changed ----- - [sw] better integration in coht, rename environment variable to FPGA_MGR
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v1.4.7
[1.4.7] 2020-01-15 ============ Added ----- - [hdl] Add support for DDR5 bank to SVEC base Fixed ----- - [hdl] DDR constraints - [hdl] DDR controller generic values are now properly capitalised - [sw] Update svec-flasher to work with new type of flash memory used in newer SVEC boards
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v1.4.8
[1.4.8] 2020-02-12 ================== Fixed ----- - [sw] fix kernel crash when programming new bitstream
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v1.4.9
[1.4.9] 2020-03-10 ================== Fixed ----- - [sw] reduce allocation on stack - [sw] automatically remove device after FPGA reprogram (otherwise unusable)